diff options
author | Richard Sandiford <richard.sandiford@arm.com> | 2019-09-09 17:59:25 +0000 |
---|---|---|
committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2019-09-09 17:59:25 +0000 |
commit | d15e5131845e2a68513230a624839ef5abcda690 (patch) | |
tree | ef0379a5c245addad8d4072f885d6fc06dae2fd5 /gcc/sel-sched.c | |
parent | 44942965f4eae141bd1f8300e7f77d0c9a3936e4 (diff) | |
download | gcc-d15e5131845e2a68513230a624839ef5abcda690.zip gcc-d15e5131845e2a68513230a624839ef5abcda690.tar.gz gcc-d15e5131845e2a68513230a624839ef5abcda690.tar.bz2 |
Remove AND_COMPL_HARD_REG_SET
Use "x &= ~y" instead of "AND_COMPL_HARD_REG_SET (x, y)", or just
"x & ~y" if the result is a temporary. This means that we're splitting
it into two operations, but the compiler should be able to combine them
for reasonable values of FIRST_PSEUDO_REGISTER.
2019-09-09 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
* caller-save.c (setup_save_areas): Use "&~" instead of
AND_COMPL_HARD_REG_SET.
(save_call_clobbered_regs): Likewise.
* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
Likewise.
* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
* config/gcn/gcn.c (gcn_md_reorg): Likewise.
* config/i386/i386.c (ix86_conditional_register_usage): Likewise.
* config/mips/mips.c (mips_class_max_nregs): Likewise.
(mips_conditional_register_usage): Likewise.
* config/sh/sh.c (output_stack_adjust): Likewise.
* ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
(setup_profitable_hard_regs): Likewise.
(get_conflict_and_start_profitable_regs): Likewise.
* ira-conflicts.c (print_allocno_conflicts): Likewise.
(ira_build_conflicts): Likewise.
* ira-costs.c (restrict_cost_classes): Likewise.
(setup_regno_cost_classes_by_aclass): Likewise.
* ira-lives.c (process_bb_node_lives): Likewise.
* ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
(setup_class_subset_and_memory_move_costs, setup_pressure_classes)
(setup_allocno_and_important_classes, setup_class_translate_array)
(setup_reg_class_relations, setup_prohibited_class_mode_regs):
Likewise.
* lra-assigns.c (find_hard_regno_for_1): Likewise.
* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
(process_alt_operands, inherit_in_ebb): Likewise.
* lra-eliminations.c (update_reg_eliminate): Likewise.
* lra-lives.c (process_bb_lives): Likewise.
* reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
* resource.c (find_dead_or_set_registers): Likewise.
(mark_target_live_regs): Likewise.
* sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
* sel-sched.c (mark_unavailable_hard_regs): Likewise.
(implicit_clobber_conflict_p): Likewise.
* shrink-wrap.c (requires_stack_frame_p): Likewise.
(try_shrink_wrapping): Likewise.
From-SVN: r275532
Diffstat (limited to 'gcc/sel-sched.c')
-rw-r--r-- | gcc/sel-sched.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c index e5b825a..9447b92 100644 --- a/gcc/sel-sched.c +++ b/gcc/sel-sched.c @@ -1248,8 +1248,8 @@ mark_unavailable_hard_regs (def_t def, struct reg_rename *reg_rename_p, /* Exclude registers that are partially call clobbered. */ if (def->crosses_call && !targetm.hard_regno_call_part_clobbered (NULL, regno, mode)) - AND_COMPL_HARD_REG_SET (reg_rename_p->available_for_renaming, - sel_hrd.regs_for_call_clobbered[mode]); + reg_rename_p->available_for_renaming + &= ~sel_hrd.regs_for_call_clobbered[mode]; /* Leave only those that are ok to rename. */ EXECUTE_IF_SET_IN_HARD_REG_SET (reg_rename_p->available_for_renaming, @@ -1270,8 +1270,7 @@ mark_unavailable_hard_regs (def_t def, struct reg_rename *reg_rename_p, cur_reg); } - AND_COMPL_HARD_REG_SET (reg_rename_p->available_for_renaming, - reg_rename_p->unavailable_hard_regs); + reg_rename_p->available_for_renaming &= ~reg_rename_p->unavailable_hard_regs; /* Regno is always ok from the renaming part of view, but it really could be in *unavailable_hard_regs already, so set it here instead @@ -2105,7 +2104,7 @@ implicit_clobber_conflict_p (insn_t through_insn, expr_t expr) preprocess_constraints (insn); alternative_mask prefrred = get_preferred_alternatives (insn); ira_implicitly_set_insn_hard_regs (&temp, prefrred); - AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); + temp &= ~ira_no_alloc_regs; /* If any implicit clobber registers intersect with regular ones in through_insn, we have a dependency and thus bail out. */ |