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| author | Ju-Zhe Zhong <juzhe.zhong@rivai.ai> | 2023-02-15 06:27:33 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-02-17 10:46:35 +0800 |
| commit | b2dec44ee77c00bab51faa8527106a01b7c796f4 (patch) | |
| tree | e5972c1fd3173792b5a82ae994dd9843885cb3db /gcc/rust | |
| parent | 5804c20b13f28cf6c2e464003c338104bb508906 (diff) | |
| download | gcc-b2dec44ee77c00bab51faa8527106a01b7c796f4.zip gcc-b2dec44ee77c00bab51faa8527106a01b7c796f4.tar.gz gcc-b2dec44ee77c00bab51faa8527106a01b7c796f4.tar.bz2 | |
RISC-V: Rearrange the organization of declarations of RVV intrinsics [NFC]
This patch doesn't change any functionality, only rearrange the oraganzation.
Make it to be consistent with RVV ISA. Add annotation for it to make codes
more readable.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
(vsm): Ditto.
(vsse): Ditto.
(vsoxei64): Ditto.
(vsub): Ditto.
(vand): Ditto.
(vor): Ditto.
(vxor): Ditto.
(vsll): Ditto.
(vsra): Ditto.
(vsrl): Ditto.
(vmin): Ditto.
(vmax): Ditto.
(vminu): Ditto.
(vmaxu): Ditto.
(vmul): Ditto.
(vmulh): Ditto.
(vmulhu): Ditto.
(vmulhsu): Ditto.
(vdiv): Ditto.
(vrem): Ditto.
(vdivu): Ditto.
(vremu): Ditto.
(vnot): Ditto.
(vsext): Ditto.
(vzext): Ditto.
(vwadd): Ditto.
(vwsub): Ditto.
(vwmul): Ditto.
(vwmulu): Ditto.
(vwmulsu): Ditto.
(vwaddu): Ditto.
(vwsubu): Ditto.
(vsbc): Ditto.
(vmsbc): Ditto.
(vnsra): Ditto.
(vmerge): Ditto.
(vmv_v): Ditto.
(vmsne): Ditto.
(vmslt): Ditto.
(vmsgt): Ditto.
(vmsle): Ditto.
(vmsge): Ditto.
(vmsltu): Ditto.
(vmsgtu): Ditto.
(vmsleu): Ditto.
(vmsgeu): Ditto.
(vnmsac): Ditto.
(vmadd): Ditto.
(vnmsub): Ditto.
(vwmacc): Ditto.
(vsadd): Ditto.
(vssub): Ditto.
(vssubu): Ditto.
(vaadd): Ditto.
(vasub): Ditto.
(vasubu): Ditto.
(vsmul): Ditto.
(vssra): Ditto.
(vssrl): Ditto.
(vnclip): Ditto.
Diffstat (limited to 'gcc/rust')
0 files changed, 0 insertions, 0 deletions