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author | liuhongt <hongtao.liu@intel.com> | 2022-10-25 13:31:54 +0800 |
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committer | liuhongt <hongtao.liu@intel.com> | 2022-10-31 09:50:07 +0800 |
commit | 6913cad2a38bc406b137b06d579b650f6fe9a2e6 (patch) | |
tree | 160fcedc12fd05945ecb4498483368395ec2d7c9 /gcc/rust | |
parent | da5e884411903f82cb665476a0e8df3fe51a84ae (diff) | |
download | gcc-6913cad2a38bc406b137b06d579b650f6fe9a2e6.zip gcc-6913cad2a38bc406b137b06d579b650f6fe9a2e6.tar.gz gcc-6913cad2a38bc406b137b06d579b650f6fe9a2e6.tar.bz2 |
Enable V4BFmode and V2BFmode.
Enable V4BFmode and V2BFmode with the same ABI as V4HFmode and
V2HFmode. No real operation is supported for them except for movement.
This should solve PR target/107261.
Also I notice there's redundancy in VALID_AVX512FP16_REG_MODE, and
remove V2BFmode remove it.
gcc/ChangeLog:
PR target/107261
* config/i386/i386-modes.def (VECTOR_MODE): Support V2BFmode.
* config/i386/i386.cc (classify_argument): Handle V4BFmode and
V2BFmode.
(ix86_convert_const_vector_to_integer): Ditto.
* config/i386/i386.h (VALID_AVX512FP16_REG_MODE): Remove
V2BFmode.
(VALID_SSE2_REG_MODE): Add V4BFmode and V2BFmode.
(VALID_MMX_REG_MODE): Add V4BFmode.
* config/i386/i386.md (mode): Add V4BF and V2BF.
(MODE_SIZE): Ditto.
* config/i386/mmx.md (MMXMODE) Add V4BF.
(V_32): Add V2BF.
(V_16_32_64): Add V4BF and V2BF.
(mmxinsnmode): Add V4BF and V2BF.
(*mov<mode>_internal): Hanlde V4BFmode and V2BFmode.
gcc/testsuite/ChangeLog:
* gcc.target/i386/pr107261.c: New test.
Diffstat (limited to 'gcc/rust')
0 files changed, 0 insertions, 0 deletions