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| author | Kito Cheng <kito.cheng@sifive.com> | 2022-12-19 21:55:15 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2022-12-19 22:22:30 +0800 |
| commit | c2c29fbebb9ea2e9e720a29d74b4e541e5c79953 (patch) | |
| tree | bd4a29b19b6586841e7153b936235fe3f4d44a0b /gcc/rust/resolve | |
| parent | 9243c3d1b63b9092a82178392145f9e9d62423d9 (diff) | |
| download | gcc-c2c29fbebb9ea2e9e720a29d74b4e541e5c79953.zip gcc-c2c29fbebb9ea2e9e720a29d74b4e541e5c79953.tar.gz gcc-c2c29fbebb9ea2e9e720a29d74b4e541e5c79953.tar.bz2 | |
RISC-V: Simplify ASM checks in gcc.target/riscv/rvv/base/.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/mov-1.c: Simplify operand check.
* gcc.target/riscv/rvv/base/mov-10.c: Ditto.
* gcc.target/riscv/rvv/base/mov-11.c: Ditto.
* gcc.target/riscv/rvv/base/mov-12.c: Ditto.
* gcc.target/riscv/rvv/base/mov-2.c: Ditto.
* gcc.target/riscv/rvv/base/mov-3.c: Ditto.
* gcc.target/riscv/rvv/base/mov-4.c: Ditto.
* gcc.target/riscv/rvv/base/mov-5.c: Ditto.
* gcc.target/riscv/rvv/base/mov-6.c: Ditto.
* gcc.target/riscv/rvv/base/mov-8.c: Ditto.
* gcc.target/riscv/rvv/base/mov-9.c: Ditto.
* gcc.target/riscv/rvv/base/vread_csr.c: Ditto.
* gcc.target/riscv/rvv/base/vsetvl-1.c: Ditto.
* gcc.target/riscv/rvv/base/vwrite_csr.c: Ditto.
Diffstat (limited to 'gcc/rust/resolve')
0 files changed, 0 insertions, 0 deletions