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author | Xi Ruoyao <xry111@xry111.site> | 2023-11-17 20:44:17 +0800 |
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committer | Xi Ruoyao <xry111@xry111.site> | 2023-11-19 01:11:09 +0800 |
commit | 56752a6bbfb3d3501d0899b23020c3e2eb58882c (patch) | |
tree | 1fb8f488fca33ce25477d45c0246edd687a4a23b /gcc/rust/resolve | |
parent | 20a3c74c347429c109bc7002285b735be83f6a0b (diff) | |
download | gcc-56752a6bbfb3d3501d0899b23020c3e2eb58882c.zip gcc-56752a6bbfb3d3501d0899b23020c3e2eb58882c.tar.gz gcc-56752a6bbfb3d3501d0899b23020c3e2eb58882c.tar.bz2 |
LoongArch: Fix internal error running "gcc -march=native" on LA664
On LA664, the PRID preset is ISA_BASE_LA64V110 but the base architecture
is guessed ISA_BASE_LA64V100. This causes a warning to be outputed:
cc1: warning: base architecture 'la64' differs from PRID preset '?'
But we've not set the "?" above in loongarch_isa_base_strings, thus it's
a nullptr and then an ICE is triggered.
Add ISA_BASE_LA64V110 to genopts and initialize
loongarch_isa_base_strings[ISA_BASE_LA64V110] correctly to fix the ICE.
The warning itself will be fixed later.
gcc/ChangeLog:
* config/loongarch/genopts/loongarch-strings:
(STR_ISA_BASE_LA64V110): Add.
* config/loongarch/genopts/loongarch.opt.in:
(ISA_BASE_LA64V110): Add.
* config/loongarch/loongarch-def.c
(loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110]
to STR_ISA_BASE_LA64V110.
* config/loongarch/loongarch.opt: Regenerate.
* config/loongarch/loongarch-str.h: Regenerate.
Diffstat (limited to 'gcc/rust/resolve')
0 files changed, 0 insertions, 0 deletions