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| author | Vladimir N. Makarov <vmakarov@redhat.com> | 2022-12-15 14:11:05 -0500 |
|---|---|---|
| committer | Vladimir N. Makarov <vmakarov@redhat.com> | 2022-12-15 14:19:19 -0500 |
| commit | 12abd5a7d13209f79664ea603b3f3517f71b8c4f (patch) | |
| tree | 33ef2dedc4b7ed559a43cd0d965bdf3eefc850eb /gcc/rust/resolve | |
| parent | 8b775b4c48a3cc4ef5c50e56144aea02da2e9cc6 (diff) | |
| download | gcc-12abd5a7d13209f79664ea603b3f3517f71b8c4f.zip gcc-12abd5a7d13209f79664ea603b3f3517f71b8c4f.tar.gz gcc-12abd5a7d13209f79664ea603b3f3517f71b8c4f.tar.bz2 | |
IRA: Check that reg classes contain a hard reg of given mode in reg move cost calculation
IRA calculates wrong AVR costs for moving general hard regs of SFmode. To
calculate the costs we did not exclude sub-classes which do not contain
hard regs of given mode. This was the reason for spilling a pseudo in the
PR. The patch fixes this.
PR rtl-optimization/90706
gcc/ChangeLog:
* ira-costs.cc: Include print-rtl.h.
(record_reg_classes, scan_one_insn): Add code to print debug info.
* ira.cc (ira_init_register_move_cost): Check that at least one hard
reg of the mode are in the class contents to calculate the
register move costs.
gcc/testsuite/ChangeLog:
* gcc.target/avr/pr90706.c: New.
Diffstat (limited to 'gcc/rust/resolve')
0 files changed, 0 insertions, 0 deletions