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| author | Richard Earnshaw <rearnsha@arm.com> | 2022-12-19 15:01:49 +0000 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2022-12-19 15:03:30 +0000 |
| commit | aa510619f8b650322c113d8593dd57afe6c6f9ae (patch) | |
| tree | 63b13e035694e04129049c8d4491ebeca6fee2ed /gcc/rust/backend | |
| parent | 8577356f4b8a2c9a397390339006eca8f6efa14d (diff) | |
| download | gcc-aa510619f8b650322c113d8593dd57afe6c6f9ae.zip gcc-aa510619f8b650322c113d8593dd57afe6c6f9ae.tar.gz gcc-aa510619f8b650322c113d8593dd57afe6c6f9ae.tar.bz2 | |
arm: correctly define __ARM_FEATURE_CLZ
The ACLE requires that __ARM_FEATURE_CLZ be defined if the hardware
supports it; it's also clear that this doesn't mean the current ISA,
so we must define this even when compiling for Thumb1 if the target
supports CLZ in A32.
This brings GCC into alignment with Clang.
gcc/ChangeLog:
* config/arm/arm-c.cc (__ARM_FEATURE_CLZ): Fix definition of
preprocessor macro when target has CLZ in another ISA.
Diffstat (limited to 'gcc/rust/backend')
0 files changed, 0 insertions, 0 deletions