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authorAdam Nemet <anemet@caviumnetworks.com>2007-07-06 00:20:46 +0000
committerAdam Nemet <nemet@gcc.gnu.org>2007-07-06 00:20:46 +0000
commit22761ec3b9b4688e515019b6b97025fda5be6a44 (patch)
treef707059f7c1e3dc69a66829d782c26a55fe2be16 /gcc/rtlanal.c
parent4f0a96f532a86eb4b81e932af2208a81ba169b33 (diff)
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rtlanal.c (num_sign_bit_copies1): Improve cases of ANDing or IORing with a constant.
* rtlanal.c (num_sign_bit_copies1): Improve cases of ANDing or IORing with a constant. From-SVN: r126397
Diffstat (limited to 'gcc/rtlanal.c')
-rw-r--r--gcc/rtlanal.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 3cdb76a..9535104 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -4290,6 +4290,25 @@ num_sign_bit_copies1 (rtx x, enum machine_mode mode, rtx known_x,
known_x, known_mode, known_ret);
num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
known_x, known_mode, known_ret);
+
+ /* If num1 is clearing some of the top bits then regardless of
+ the other term, we are guaranteed to have at least that many
+ high-order zero bits. */
+ if (code == AND
+ && num1 > 1
+ && bitwidth <= HOST_BITS_PER_WIDE_INT
+ && GET_CODE (XEXP (x, 1)) == CONST_INT
+ && !(INTVAL (XEXP (x, 1)) & ((HOST_WIDE_INT) 1 << (bitwidth - 1))))
+ return num1;
+
+ /* Similarly for IOR when setting high-order bits. */
+ if (code == IOR
+ && num1 > 1
+ && bitwidth <= HOST_BITS_PER_WIDE_INT
+ && GET_CODE (XEXP (x, 1)) == CONST_INT
+ && (INTVAL (XEXP (x, 1)) & ((HOST_WIDE_INT) 1 << (bitwidth - 1))))
+ return num1;
+
return MIN (num0, num1);
case PLUS: case MINUS: