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author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-12-20 12:54:28 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-12-20 12:54:28 +0000 |
commit | 91914e56a5e952cc87468bdd6d006e51eaa54294 (patch) | |
tree | bd8f6dfd41592b49da05616444cddb8a72b5109f /gcc/rtlanal.c | |
parent | 9dcf1f868c048e20c72df7ee5d378625d1e77bc8 (diff) | |
download | gcc-91914e56a5e952cc87468bdd6d006e51eaa54294.zip gcc-91914e56a5e952cc87468bdd6d006e51eaa54294.tar.gz gcc-91914e56a5e952cc87468bdd6d006e51eaa54294.tar.bz2 |
poly_int: SUBREG_BYTE
This patch changes SUBREG_BYTE from an int to a poly_int.
Since valid SUBREG_BYTEs must be contained within the mode of the
SUBREG_REG, the required range is the same as for GET_MODE_SIZE,
i.e. unsigned short. The patch therefore uses poly_uint16(_pod)
for the SUBREG_BYTE.
Using poly_uint16_pod rtx fields requires a new field code ('p').
Since there are no other uses of 'p' besides SUBREG_BYTE, the patch
doesn't add an XPOLY or whatever; all uses should go via SUBREG_BYTE
instead.
The patch doesn't bother implementing 'p' support for legacy
define_peepholes, since none of the remaining ones have subregs
in their patterns.
As it happened, the rtl documentation used SUBREG as an example of a
code with mixed field types, accessed via XEXP (x, 0) and XINT (x, 1).
Since there's no direct replacement for XINT, and since people should
never use it even if there were, the patch changes the example to use
INT_LIST instead.
The patch also changes subreg-related helper functions so that they too
take and return polynomial offsets. This makes the patch quite big, but
it's mostly mechanical. The patch generally sticks to existing choices
wrt signedness.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* doc/rtl.texi: Update documentation of SUBREG_BYTE. Document the
'p' format code. Use INT_LIST rather than SUBREG as the example of
a code with an XINT and an XEXP. Remove the implication that
accessing an rtx field using XINT is expected to work.
* rtl.def (SUBREG): Change format from "ei" to "ep".
* rtl.h (rtunion::rt_subreg): New field.
(XCSUBREG): New macro.
(SUBREG_BYTE): Use it.
(subreg_shape): Change offset from an unsigned int to a poly_uint16.
Update constructor accordingly.
(subreg_shape::operator ==): Update accordingly.
(subreg_shape::unique_id): Return an unsigned HOST_WIDE_INT rather
than an unsigned int.
(subreg_lsb, subreg_lowpart_offset, subreg_highpart_offset): Return
a poly_uint64 rather than an unsigned int.
(subreg_lsb_1): Likewise. Take the offset as a poly_uint64 rather
than an unsigned int.
(subreg_size_offset_from_lsb, subreg_size_lowpart_offset)
(subreg_size_highpart_offset): Return a poly_uint64 rather than
an unsigned int. Take the sizes as poly_uint64s.
(subreg_offset_from_lsb): Return a poly_uint64 rather than
an unsigned int. Take the shift as a poly_uint64 rather than
an unsigned int.
(subreg_regno_offset, subreg_offset_representable_p): Take the offset
as a poly_uint64 rather than an unsigned int.
(simplify_subreg_regno): Likewise.
(byte_lowpart_offset): Return the memory offset as a poly_int64
rather than an int.
(subreg_memory_offset): Likewise. Take the subreg offset as a
poly_uint64 rather than an unsigned int.
(simplify_subreg, simplify_gen_subreg, subreg_get_info)
(gen_rtx_SUBREG, validate_subreg): Take the subreg offset as a
poly_uint64 rather than an unsigned int.
* rtl.c (rtx_format): Describe 'p' in comment.
(copy_rtx, rtx_equal_p_cb, rtx_equal_p): Handle 'p'.
* emit-rtl.c (validate_subreg, gen_rtx_SUBREG): Take the subreg
offset as a poly_uint64 rather than an unsigned int.
(byte_lowpart_offset): Return the memory offset as a poly_int64
rather than an int.
(subreg_memory_offset): Likewise. Take the subreg offset as a
poly_uint64 rather than an unsigned int.
(subreg_size_lowpart_offset, subreg_size_highpart_offset): Take the
mode sizes as poly_uint64s rather than unsigned ints. Return a
poly_uint64 rather than an unsigned int.
(subreg_lowpart_p): Treat subreg offsets as poly_ints.
(copy_insn_1): Handle 'p'.
* rtlanal.c (set_noop_p): Treat subregs offsets as poly_uint64s.
(subreg_lsb_1): Take the subreg offset as a poly_uint64 rather than
an unsigned int. Return the shift in the same way.
(subreg_lsb): Return the shift as a poly_uint64 rather than an
unsigned int.
(subreg_size_offset_from_lsb): Take the sizes and shift as
poly_uint64s rather than unsigned ints. Return the offset as
a poly_uint64.
(subreg_get_info, subreg_regno_offset, subreg_offset_representable_p)
(simplify_subreg_regno): Take the offset as a poly_uint64 rather than
an unsigned int.
* rtlhash.c (add_rtx): Handle 'p'.
* genemit.c (gen_exp): Likewise.
* gengenrtl.c (type_from_format, gendef): Likewise.
* gensupport.c (subst_pattern_match, get_alternatives_number)
(collect_insn_data, alter_predicate_for_insn, alter_constraints)
(subst_dup): Likewise.
* gengtype.c (adjust_field_rtx_def): Likewise.
* genrecog.c (find_operand, find_matching_operand, validate_pattern)
(match_pattern_2): Likewise.
(rtx_test::SUBREG_FIELD): New rtx_test::kind_enum.
(rtx_test::subreg_field): New function.
(operator ==, safe_to_hoist_p, transition_parameter_type)
(print_nonbool_test, print_test): Handle SUBREG_FIELD.
* genattrtab.c (attr_rtx_1): Say that 'p' is deliberately not handled.
* genpeep.c (match_rtx): Likewise.
* print-rtl.c (print_poly_int): Include if GENERATOR_FILE too.
(rtx_writer::print_rtx_operand): Handle 'p'.
(print_value): Handle SUBREG.
* read-rtl.c (apply_int_iterator): Likewise.
(rtx_reader::read_rtx_operand): Handle 'p'.
* alias.c (rtx_equal_for_memref_p): Likewise.
* cselib.c (rtx_equal_for_cselib_1, cselib_hash_rtx): Likewise.
* caller-save.c (replace_reg_with_saved_mem): Treat subreg offsets
as poly_ints.
* calls.c (expand_call): Likewise.
* combine.c (combine_simplify_rtx, expand_field_assignment): Likewise.
(make_extraction, gen_lowpart_for_combine): Likewise.
* loop-invariant.c (hash_invariant_expr_1, invariant_expr_equal_p):
Likewise.
* cse.c (remove_invalid_subreg_refs): Take the offset as a poly_uint64
rather than an unsigned int. Treat subreg offsets as poly_ints.
(exp_equiv_p): Handle 'p'.
(hash_rtx_cb): Likewise. Treat subreg offsets as poly_ints.
(equiv_constant, cse_insn): Treat subreg offsets as poly_ints.
* dse.c (find_shift_sequence): Likewise.
* dwarf2out.c (rtl_for_decl_location): Likewise.
* expmed.c (extract_low_bits): Likewise.
* expr.c (emit_group_store, undefined_operand_subword_p): Likewise.
(expand_expr_real_2): Likewise.
* final.c (alter_subreg): Likewise.
(leaf_renumber_regs_insn): Handle 'p'.
* function.c (assign_parm_find_stack_rtl, assign_parm_setup_stack):
Treat subreg offsets as poly_ints.
* fwprop.c (forward_propagate_and_simplify): Likewise.
* ifcvt.c (noce_emit_move_insn, noce_emit_cmove): Likewise.
* ira.c (get_subreg_tracking_sizes): Likewise.
* ira-conflicts.c (go_through_subreg): Likewise.
* ira-lives.c (process_single_reg_class_operands): Likewise.
* jump.c (rtx_renumbered_equal_p): Likewise. Handle 'p'.
* lower-subreg.c (simplify_subreg_concatn): Take the subreg offset
as a poly_uint64 rather than an unsigned int.
(simplify_gen_subreg_concatn, resolve_simple_move): Treat
subreg offsets as poly_ints.
* lra-constraints.c (operands_match_p): Handle 'p'.
(match_reload, curr_insn_transform): Treat subreg offsets as poly_ints.
* lra-spills.c (assign_mem_slot): Likewise.
* postreload.c (move2add_valid_value_p): Likewise.
* recog.c (general_operand, indirect_operand): Likewise.
* regcprop.c (copy_value, maybe_mode_change): Likewise.
(copyprop_hardreg_forward_1): Likewise.
* reginfo.c (simplifiable_subregs_hasher::hash, simplifiable_subregs)
(record_subregs_of_mode): Likewise.
* rtlhooks.c (gen_lowpart_general, gen_lowpart_if_possible): Likewise.
* reload.c (operands_match_p): Handle 'p'.
(find_reloads_subreg_address): Treat subreg offsets as poly_ints.
* reload1.c (alter_reg, choose_reload_regs): Likewise.
(compute_reload_subreg_offset): Likewise, and return an poly_int64.
* simplify-rtx.c (simplify_truncation, simplify_binary_operation_1):
(test_vector_ops_duplicate): Treat subreg offsets as poly_ints.
(simplify_const_poly_int_tests<N>::run): Likewise.
(simplify_subreg, simplify_gen_subreg): Take the subreg offset as
a poly_uint64 rather than an unsigned int.
* valtrack.c (debug_lowpart_subreg): Likewise.
* var-tracking.c (var_lowpart): Likewise.
(loc_cmp): Handle 'p'.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255882
Diffstat (limited to 'gcc/rtlanal.c')
-rw-r--r-- | gcc/rtlanal.c | 138 |
1 files changed, 79 insertions, 59 deletions
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index 2116907..5a9da9e 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -1586,7 +1586,7 @@ set_noop_p (const_rtx set) if (GET_CODE (src) == SUBREG && GET_CODE (dst) == SUBREG) { - if (SUBREG_BYTE (src) != SUBREG_BYTE (dst)) + if (maybe_ne (SUBREG_BYTE (src), SUBREG_BYTE (dst))) return 0; src = SUBREG_REG (src); dst = SUBREG_REG (dst); @@ -3557,48 +3557,50 @@ loc_mentioned_in_p (rtx *loc, const_rtx in) and SUBREG_BYTE, return the bit offset where the subreg begins (counting from the least significant bit of the operand). */ -unsigned int +poly_uint64 subreg_lsb_1 (machine_mode outer_mode, machine_mode inner_mode, - unsigned int subreg_byte) + poly_uint64 subreg_byte) { - unsigned int bitpos; - unsigned int byte; - unsigned int word; + poly_uint64 subreg_end, trailing_bytes, byte_pos; /* A paradoxical subreg begins at bit position 0. */ if (paradoxical_subreg_p (outer_mode, inner_mode)) return 0; - if (WORDS_BIG_ENDIAN != BYTES_BIG_ENDIAN) - /* If the subreg crosses a word boundary ensure that - it also begins and ends on a word boundary. */ - gcc_assert (!((subreg_byte % UNITS_PER_WORD - + GET_MODE_SIZE (outer_mode)) > UNITS_PER_WORD - && (subreg_byte % UNITS_PER_WORD - || GET_MODE_SIZE (outer_mode) % UNITS_PER_WORD))); - - if (WORDS_BIG_ENDIAN) - word = (GET_MODE_SIZE (inner_mode) - - (subreg_byte + GET_MODE_SIZE (outer_mode))) / UNITS_PER_WORD; - else - word = subreg_byte / UNITS_PER_WORD; - bitpos = word * BITS_PER_WORD; - - if (BYTES_BIG_ENDIAN) - byte = (GET_MODE_SIZE (inner_mode) - - (subreg_byte + GET_MODE_SIZE (outer_mode))) % UNITS_PER_WORD; + subreg_end = subreg_byte + GET_MODE_SIZE (outer_mode); + trailing_bytes = GET_MODE_SIZE (inner_mode) - subreg_end; + if (WORDS_BIG_ENDIAN && BYTES_BIG_ENDIAN) + byte_pos = trailing_bytes; + else if (!WORDS_BIG_ENDIAN && !BYTES_BIG_ENDIAN) + byte_pos = subreg_byte; else - byte = subreg_byte % UNITS_PER_WORD; - bitpos += byte * BITS_PER_UNIT; + { + /* When bytes and words have opposite endianness, we must be able + to split offsets into words and bytes at compile time. */ + poly_uint64 leading_word_part + = force_align_down (subreg_byte, UNITS_PER_WORD); + poly_uint64 trailing_word_part + = force_align_down (trailing_bytes, UNITS_PER_WORD); + /* If the subreg crosses a word boundary ensure that + it also begins and ends on a word boundary. */ + gcc_assert (known_le (subreg_end - leading_word_part, + (unsigned int) UNITS_PER_WORD) + || (known_eq (leading_word_part, subreg_byte) + && known_eq (trailing_word_part, trailing_bytes))); + if (WORDS_BIG_ENDIAN) + byte_pos = trailing_word_part + (subreg_byte - leading_word_part); + else + byte_pos = leading_word_part + (trailing_bytes - trailing_word_part); + } - return bitpos; + return byte_pos * BITS_PER_UNIT; } /* Given a subreg X, return the bit offset where the subreg begins (counting from the least significant bit of the reg). */ -unsigned int +poly_uint64 subreg_lsb (const_rtx x) { return subreg_lsb_1 (GET_MODE (x), GET_MODE (SUBREG_REG (x)), @@ -3611,29 +3613,32 @@ subreg_lsb (const_rtx x) lsb of the inner value. This is the inverse of the calculation performed by subreg_lsb_1 (which converts byte offsets to bit shifts). */ -unsigned int -subreg_size_offset_from_lsb (unsigned int outer_bytes, - unsigned int inner_bytes, - unsigned int lsb_shift) +poly_uint64 +subreg_size_offset_from_lsb (poly_uint64 outer_bytes, poly_uint64 inner_bytes, + poly_uint64 lsb_shift) { /* A paradoxical subreg begins at bit position 0. */ - if (outer_bytes > inner_bytes) + gcc_checking_assert (ordered_p (outer_bytes, inner_bytes)); + if (maybe_gt (outer_bytes, inner_bytes)) { - gcc_checking_assert (lsb_shift == 0); + gcc_checking_assert (known_eq (lsb_shift, 0U)); return 0; } - gcc_assert (lsb_shift % BITS_PER_UNIT == 0); - unsigned int lower_bytes = lsb_shift / BITS_PER_UNIT; - unsigned int upper_bytes = inner_bytes - (lower_bytes + outer_bytes); + poly_uint64 lower_bytes = exact_div (lsb_shift, BITS_PER_UNIT); + poly_uint64 upper_bytes = inner_bytes - (lower_bytes + outer_bytes); if (WORDS_BIG_ENDIAN && BYTES_BIG_ENDIAN) return upper_bytes; else if (!WORDS_BIG_ENDIAN && !BYTES_BIG_ENDIAN) return lower_bytes; else { - unsigned int lower_word_part = lower_bytes & -UNITS_PER_WORD; - unsigned int upper_word_part = upper_bytes & -UNITS_PER_WORD; + /* When bytes and words have opposite endianness, we must be able + to split offsets into words and bytes at compile time. */ + poly_uint64 lower_word_part = force_align_down (lower_bytes, + UNITS_PER_WORD); + poly_uint64 upper_word_part = force_align_down (upper_bytes, + UNITS_PER_WORD); if (WORDS_BIG_ENDIAN) return upper_word_part + (lower_bytes - lower_word_part); else @@ -3662,7 +3667,7 @@ subreg_size_offset_from_lsb (unsigned int outer_bytes, void subreg_get_info (unsigned int xregno, machine_mode xmode, - unsigned int offset, machine_mode ymode, + poly_uint64 offset, machine_mode ymode, struct subreg_info *info) { unsigned int nregs_xmode, nregs_ymode; @@ -3679,6 +3684,9 @@ subreg_get_info (unsigned int xregno, machine_mode xmode, at least one register. */ if (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode)) { + /* As a consequence, we must be dealing with a constant number of + scalars, and thus a constant offset. */ + HOST_WIDE_INT coffset = offset.to_constant (); nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode); unsigned int nunits = GET_MODE_NUNITS (xmode); scalar_mode xmode_unit = GET_MODE_INNER (xmode); @@ -3697,9 +3705,9 @@ subreg_get_info (unsigned int xregno, machine_mode xmode, 3 for each part, but in memory it's two 128-bit parts. Padding is assumed to be at the end (not necessarily the 'high part') of each unit. */ - if ((offset / GET_MODE_SIZE (xmode_unit) + 1 < nunits) - && (offset / GET_MODE_SIZE (xmode_unit) - != ((offset + ysize - 1) / GET_MODE_SIZE (xmode_unit)))) + if ((coffset / GET_MODE_SIZE (xmode_unit) + 1 < nunits) + && (coffset / GET_MODE_SIZE (xmode_unit) + != ((coffset + ysize - 1) / GET_MODE_SIZE (xmode_unit)))) { info->representable_p = false; rknown = true; @@ -3711,7 +3719,7 @@ subreg_get_info (unsigned int xregno, machine_mode xmode, nregs_ymode = hard_regno_nregs (xregno, ymode); /* Paradoxical subregs are otherwise valid. */ - if (!rknown && offset == 0 && ysize > xsize) + if (!rknown && known_eq (offset, 0U) && ysize > xsize) { info->representable_p = true; /* If this is a big endian paradoxical subreg, which uses more @@ -3746,16 +3754,22 @@ subreg_get_info (unsigned int xregno, machine_mode xmode, { info->representable_p = false; info->nregs = CEIL (ysize, regsize_xmode); - info->offset = offset / regsize_xmode; + if (!can_div_trunc_p (offset, regsize_xmode, &info->offset)) + /* Checked by validate_subreg. We must know at compile time + which inner registers are being accessed. */ + gcc_unreachable (); return; } /* It's not valid to extract a subreg of mode YMODE at OFFSET that would go outside of XMODE. */ - if (!rknown && ysize + offset > xsize) + if (!rknown && maybe_gt (ysize + offset, xsize)) { info->representable_p = false; info->nregs = nregs_ymode; - info->offset = offset / regsize_xmode; + if (!can_div_trunc_p (offset, regsize_xmode, &info->offset)) + /* Checked by validate_subreg. We must know at compile time + which inner registers are being accessed. */ + gcc_unreachable (); return; } /* Quick exit for the simple and common case of extracting whole @@ -3763,26 +3777,27 @@ subreg_get_info (unsigned int xregno, machine_mode xmode, /* ??? It would be better to integrate this into the code below, if we can generalize the concept enough and figure out how odd-sized modes can coexist with the other weird cases we support. */ + HOST_WIDE_INT count; if (!rknown && WORDS_BIG_ENDIAN == REG_WORDS_BIG_ENDIAN && regsize_xmode == regsize_ymode - && (offset % regsize_ymode) == 0) + && constant_multiple_p (offset, regsize_ymode, &count)) { info->representable_p = true; info->nregs = nregs_ymode; - info->offset = offset / regsize_ymode; + info->offset = count; gcc_assert (info->offset + info->nregs <= (int) nregs_xmode); return; } } /* Lowpart subregs are otherwise valid. */ - if (!rknown && offset == subreg_lowpart_offset (ymode, xmode)) + if (!rknown && known_eq (offset, subreg_lowpart_offset (ymode, xmode))) { info->representable_p = true; rknown = true; - if (offset == 0 || nregs_xmode == nregs_ymode) + if (known_eq (offset, 0U) || nregs_xmode == nregs_ymode) { info->offset = 0; info->nregs = nregs_ymode; @@ -3803,19 +3818,24 @@ subreg_get_info (unsigned int xregno, machine_mode xmode, These conditions may be relaxed but subreg_regno_offset would need to be redesigned. */ gcc_assert ((xsize % num_blocks) == 0); - unsigned int bytes_per_block = xsize / num_blocks; + poly_uint64 bytes_per_block = xsize / num_blocks; /* Get the number of the first block that contains the subreg and the byte offset of the subreg from the start of that block. */ - unsigned int block_number = offset / bytes_per_block; - unsigned int subblock_offset = offset % bytes_per_block; + unsigned int block_number; + poly_uint64 subblock_offset; + if (!can_div_trunc_p (offset, bytes_per_block, &block_number, + &subblock_offset)) + /* Checked by validate_subreg. We must know at compile time which + inner registers are being accessed. */ + gcc_unreachable (); if (!rknown) { /* Only the lowpart of each block is representable. */ info->representable_p - = (subblock_offset - == subreg_size_lowpart_offset (ysize, bytes_per_block)); + = known_eq (subblock_offset, + subreg_size_lowpart_offset (ysize, bytes_per_block)); rknown = true; } @@ -3842,7 +3862,7 @@ subreg_get_info (unsigned int xregno, machine_mode xmode, RETURN - The regno offset which would be used. */ unsigned int subreg_regno_offset (unsigned int xregno, machine_mode xmode, - unsigned int offset, machine_mode ymode) + poly_uint64 offset, machine_mode ymode) { struct subreg_info info; subreg_get_info (xregno, xmode, offset, ymode, &info); @@ -3858,7 +3878,7 @@ subreg_regno_offset (unsigned int xregno, machine_mode xmode, RETURN - Whether the offset is representable. */ bool subreg_offset_representable_p (unsigned int xregno, machine_mode xmode, - unsigned int offset, machine_mode ymode) + poly_uint64 offset, machine_mode ymode) { struct subreg_info info; subreg_get_info (xregno, xmode, offset, ymode, &info); @@ -3875,7 +3895,7 @@ subreg_offset_representable_p (unsigned int xregno, machine_mode xmode, int simplify_subreg_regno (unsigned int xregno, machine_mode xmode, - unsigned int offset, machine_mode ymode) + poly_uint64 offset, machine_mode ymode) { struct subreg_info info; unsigned int yregno; |