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author | Eric Botcazou <ebotcazou@adacore.com> | 2018-11-20 08:59:30 +0000 |
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committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2018-11-20 08:59:30 +0000 |
commit | 643427d70f7a547a1db8a8492a6a124ff22c0d3a (patch) | |
tree | e254592484859d6e99362a4041f1d06658035748 /gcc/rtl.h | |
parent | 07b9f1de1ea532a66d8ac103f3a9827521d780f9 (diff) | |
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re PR rtl-optimization/85925 (compilation of masking with 257 goes wrong in combine at -02)
PR rtl-optimization/85925
* rtl.h (word_register_operation_p): New predicate.
* combine.c (record_dead_and_set_regs_1): Only apply specific handling
for WORD_REGISTER_OPERATIONS targets to word_register_operation_p RTX.
* rtlanal.c (nonzero_bits1): Likewise. Adjust couple of comments.
(num_sign_bit_copies1): Likewise.
From-SVN: r266302
Diffstat (limited to 'gcc/rtl.h')
-rw-r--r-- | gcc/rtl.h | 19 |
1 files changed, 19 insertions, 0 deletions
@@ -4374,6 +4374,25 @@ strip_offset_and_add (rtx x, poly_int64_pod *offset) return x; } +/* Return true if X is an operation that always operates on the full + registers for WORD_REGISTER_OPERATIONS architectures. */ + +inline bool +word_register_operation_p (const_rtx x) +{ + switch (GET_CODE (x)) + { + case ROTATE: + case ROTATERT: + case SIGN_EXTRACT: + case ZERO_EXTRACT: + return false; + + default: + return true; + } +} + /* gtype-desc.c. */ extern void gt_ggc_mx (rtx &); extern void gt_pch_nx (rtx &); |