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| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-06-02 11:04:43 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-06-02 14:10:40 +0800 |
| commit | 37ff12b96d7c1ee5fe135253c7b9db7e2ba61b71 (patch) | |
| tree | c02a75a629fa5bb673fc52def327f99db7c7df03 /gcc/rtl.h | |
| parent | 4fe6e12204535545edf7f035d4dc79c1404058cf (diff) | |
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RISC-V: Fix warning in predicated.md
Notice there is warning in predicates.md:
../../../riscv-gcc/gcc/config/riscv/predicates.md: In function ‘bool arith_operand_or_mode_mask(rtx, machine_mode)’:
../../../riscv-gcc/gcc/config/riscv/predicates.md:33:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
(match_test "INTVAL (op) == GET_MODE_MASK (HImode)
../../../riscv-gcc/gcc/config/riscv/predicates.md:34:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
|| INTVAL (op) == GET_MODE_MASK (SImode)"))))
gcc/ChangeLog:
* config/riscv/predicates.md: Change INTVAL into UINTVAL.
Diffstat (limited to 'gcc/rtl.h')
0 files changed, 0 insertions, 0 deletions