RISC-V: Optimze the reverse conditions of rotate shift

gcc/ChangeLog:

	* config/riscv/bitmanip.md (rotrsi3_sext): Support generating
	roriw for constant counts.
	* rtl.h (reverse_rotate_by_imm_p): Add function declartion
	* simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
	(simplify_context::simplify_binary_operation_1): Use it.
	* expmed.cc (expand_shift_1): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/zbb-rol-ror-04.c: New test.
	* gcc.target/riscv/zbb-rol-ror-05.c: New test.
	* gcc.target/riscv/zbb-rol-ror-06.c: New test.
	* gcc.target/riscv/zbb-rol-ror-07.c: New test.

1 files changed, 1 insertions, 0 deletions

diff --git a/gcc/rtl.h b/gcc/rtl.h
index 52f0419..60852ae 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -3566,6 +3566,7 @@ extern bool val_signbit_known_set_p (machine_mode,
 				     unsigned HOST_WIDE_INT);
 extern bool val_signbit_known_clear_p (machine_mode,
 				       unsigned HOST_WIDE_INT);
+extern bool reverse_rotate_by_imm_p (machine_mode, unsigned int, rtx);
 
 /* In reginfo.cc  */
 extern machine_mode choose_hard_reg_mode (unsigned int, unsigned int,