alias.c (rtx_equal_for_memref_p): Use predicates to test rtx classes and new rtx class codes...

2004-02-07  Paolo Bonzini  <bonzini@gnu.org>

	* alias.c (rtx_equal_for_memref_p): Use predicates
	to test rtx classes and new rtx class codes, possibly
	splitting conditionals that tested against '<' and 'o'.
	* caller-save.c (save_call_clobbered_regs): Likewise.
	* combine.c (contains_muldiv, find_split_point, subst,
	combine_simplify_rtx, simplify_if_then_else,
	simplify_set, simplify_logical, expand_compound_operation,
	make_compound_operation, if_then_else_cond, known_cond,
	apply_distributive_law, cached_nonzero_bits,
	cached_num_sign_bit_copies, simplify_shift_const,
	gen_binary, simplify_comparison, update_table_tick,
	record_value_for_reg, get_lsat_value_validate): Likewise.
	* cse.c (mention_regs, find_best_addr, find_comparison_args,
	fold_rtx, cse_insn, invalidate_memory, cse_basic_block):
	Likewise.
	* emit-rtl.c (copy_insn_1): Likewise.
	* expr.c (force_operand): Likewise.
	* final.c (final_scan_insn, get_mem_expr_from_op): Likewise.
	* flow.c (notice_stack_pointer_modification_1,
	invalidate_mems_from_autoinc, ior_reg_cond, not_reg_cond,
	and_reg_cond, elim_reg_cond): Likewise.
	* function.c (update_epilogue_consts): Likewise.
	* genattrtab.c (attr_rtx_1): Likewise.
	* genopinit.c (gen_insn): Likewise.
	* integrate.c (subst_constants): Likewise.
	* jump.c (reversed_comparison_code_parts,
	reversed_comparison_code, delete_related_insns,
	rtx_renumbered_equal_p): Likewise.
	* local-alloc.c (block_alloc): Likewise.
	* loop.c (rtx_equal_for_prefetch_p, maybe_eliminate_biv,
	canonicalize_condition): Likewise.
	* loop-iv.c (simplify_using_conditions, iv_number_of_iterations):
	Likewise.
	* optabs.c (add_equal_node, expand_binop): Likewise.
	* predict.c (estimate_probability): Likewise.
	* ra-debug.c (ra_print_rtx_2op, ra_print_rtx): Likewise.
	* recog.c (validate_replace_rtx_1, comparison_operator,
	offsettable_address_p, constrain_operands): Likewise.
	* reg-stack.c (swap_rtx_condition_1, subst_stack_regs_pat):
	Likewise.
	* regclass.c (scan_one_insn): Likewise.
	* regmove.c (stable_and_no_regs_but_for_p): Likewise.
	* regrename.c (kill_autoinc_value): Likewise.
	* reload.c (find_reusable_reload, find_reloads,
	reg_overlap_mentioned_for_reload_p): Likewise.
	* reload1.c (gen_reload, delete_address_reloads_1): Likewise.
	* rtl.c (copy_rtx): Likewise.
	* rtl.h (CONSTANT_P, INSN_P): Likewise.
	* rtlanal.c (commutative_operand_precedence): Likewise.
	* sched-deps.c (conditions_mutex_p): Likewise.
	* sched-rgn.c (is_cfg_nonregular): Likewise.
	* simplify-rtx.c (simplify_gen_binary,
	simplify_gen_relational, simplify_replace_rtx,
	simplify_unary_operation, simplify_binary_operation,
	simplify_ternary_operation, simplify_rtx): Likewise.
	* unroll.c (reg_dead_after_loop): Likewise.
	* config/alpha/alpha.c (alpha_swapped_comparison_operator,
	print_operand): Likewise.
	* config/arc/arc.c (proper_comparison_operator): Likewise.
	* config/arm/arm.c (arm_arm_address_cost, arm_select_cc_mode):
	Likewise.
	* config/avr/avr.c (_reg_unused_after): Likewise.
	* config/frv/frv.c (frv_ifcvt_modify_tests,
	frv_ifcvt_modify_insn, frv_pack_insn): Likewise.
	* config/i386/i386.c (ix86_comparison_operator,
	ix86_carry_flag_operator, fcmov_comparison_operator,
	arith_or_logical_operator, print_operand,
	ix86_expand_binary_operator, ix86_binary_operator_ok):
	Likewise.
	* config/i386/i386.md: Likewise.
	* config/ia64/ia64.c (not_postinc_memory_operand,
	ia64_print_operand, update_set_flags, errata_emit_nops):
	Likewise.
	* config/ia64/ia64.h (PREFERRED_RELOAD_CLASS,
	CONSTRAINT_OK_FOR_S): Likewise.
	* config/ip2k/ip2k.c (mdr_resequence_xy_yx,
	mdr_try_move_dp_reload, ip2k_check_can_adjust_stack_ref,
	ip2k_xexp_not_uses_reg_for_mem, ip2k_xexp_not_uses_reg_p,
	ip2k_composite_xexp_not_uses_reg_p, ip2k_unary_operator):
	Likewise.
	* config/iq2000/iq2000.c (cmp_op, symbolic_expression_p,
	eqne_comparison_operator, signed_comparison_operator):
	Likewise.
	* config/mips/mips.c (cmp_op, symbolic_expression_p):
	Likewise.
	* config/mmix/mmix (mmix_foldable_comparison_operator,
	mmix_comparison_operator): Likewise.
	* config/pa/pa.c (hppa_legitimize_address): Likewise.
	* config/rs6000/rs6000.c (stmw_operation,
	branch_comparison_operator, trap_comparison_operator,
	ccr_bit): Likewise.
	* config/rs6000/rs6000.h (SELECT_CC_MODE): Likewise.
	* config/s390/s390.c (s390_alc_comparison,
	s390_slb_comparison):L Likewise.
	* config/sh/sh.c (gen_block_redirect, reg_unused_after):
	Likewise.
	* config/sparc/sparc.c (eq_or_neq, normal_comp_operator,
	noov_compare_op, noov_compare64_op, v9_regcmp_op,
	emit_hard_tfmode_operation, reg_unused_after)
	* doc/md.texi, doc/rtl.texi: Likewise.

	* ra-debug.c: Add 2004 to list of copyright years.
	* unroll.c: Likewise.

	* combine.c (simplify_logical): Remove dummy test,
	(apply_distributive_law): Fix typo in comment.
	GET_CODE (x) == AND so x is a commutative binary op.
	* jump.c (delete_related_insns): simplify loop
	condition, move testing of RTX codes inside the loop.
	(rtx_renumbered_equal_p): do not use RTX_CODE.
	* rtl.c (rtx_class): Declare as enum rtx_class.
	* rtl.def (EQ, NE, UNEQ, LTGT, UNORDERED, ORDERED):
	Move to RTX_COMM_COMPARE class.
	(HIGH, SYMBOL_REF, LABEL_REF, CONST, CONST_INT, CONST_DOUBLE):
	Move to RTX_CONST_OBJ class.
	* rtl.h (enum rtx_class): New declaration,
	(RTX_OBJ_MASK, RTX_OBJ_RESULT, RTX_COMPARE_MASK,
	RTX_COMPARE_RESULT, RTX_ARITHMETIC_MASK, RTX_ARITHMETIC_RESULT,
	RTX_BINARY_MASK, RTX_BINARY_RESULT, RTX_COMMUTATIVE_MASK,
	RTX_COMMUTATIVE_RESULT, RTX_NON_COMMUTATIVE_RESULT,
	RTX_EXPR_FIRST, RTX_EXPR_LAST, UNARY_P, BINARY_P,
	ARITHMETIC_P, COMMUTATIVE_ARITHMETIC_P, COMPARISON_P,
	SWAPPABLE_OPERANDS_P, NON_COMMUTATIVE_P, COMMUTATIVE_P,
	OBJECT_P): New macros.
	* config/sparc/sparc.c (noov_compare_op): Remove register
	from parameter.

From-SVN: r78824

1 files changed, 194 insertions, 179 deletions

diff --git a/gcc/rtl.def b/gcc/rtl.def
index 4e77373..c3653f4 100644
--- a/gcc/rtl.def
+++ b/gcc/rtl.def
@@ -46,18 +46,33 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
    4.  The class of the rtx.  These are stored in rtx_class and are accessed
    via the GET_RTX_CLASS macro.  They are defined as follows:
 
-     "o" an rtx code that can be used to represent an object (e.g, REG, MEM)
-     "<" an rtx code for a comparison (e.g, EQ, NE, LT)
-     "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
-     "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
-     "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
-     "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
-     "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
-     "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
-     "m" an rtx code for something that matches in insns (e.g, MATCH_DUP)
-     "g" an rtx code for grouping insns together (e.g, GROUP_PARALLEL)
-     "a" an rtx code for autoincrement addressing modes (e.g. POST_DEC)
-     "x" everything else
+     RTX_CONST_OBJ
+         an rtx code that can be used to represent a constant object
+         (e.g, CONST_INT)
+     RTX_OBJ
+         an rtx code that can be used to represent an object (e.g, REG, MEM)
+     RTX_COMPARE
+         an rtx code for a comparison (e.g, LT, GT)
+     RTX_COMM_COMPARE
+         an rtx code for a commutative comparison (e.g, EQ, NE, ORDERED)
+     RTX_UNARY
+         an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
+     RTX_COMM_ARITH
+         an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
+     RTX_TERNARY
+         an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
+     RTX_BIN_ARITH
+         an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
+     RTX_BITFIELD_OPS
+         an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
+     RTX_INSN
+         an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
+     RTX_MATCH
+         an rtx code for something that matches in insns (e.g, MATCH_DUP)
+     RTX_AUTOINC
+         an rtx code for autoincrement addressing modes (e.g. POST_DEC)
+     RTX_EXTRA
+         everything else
      
    */
 
@@ -67,27 +82,27 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
    --------------------------------------------------------------------- */
 
 /* an expression code name unknown to the reader */
-DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x')
+DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA)
 
 /* (NIL) is used by rtl reader and printer to represent a null pointer.  */
 
-DEF_RTL_EXPR(NIL, "nil", "*", 'x')
+DEF_RTL_EXPR(NIL, "nil", "*", RTX_EXTRA)
 
 
 /* include a file */
 
-DEF_RTL_EXPR(INCLUDE, "include", "s", 'x')
+DEF_RTL_EXPR(INCLUDE, "include", "s", RTX_EXTRA)
 
 /* ---------------------------------------------------------------------
    Expressions used in constructing lists.
    --------------------------------------------------------------------- */
 
 /* a linked list of expressions */
-DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x')
+DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA)
 
 /* a linked list of instructions.
    The insns are represented in print by their uids.  */
-DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
+DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
 
 /* ----------------------------------------------------------------------
    Expression types for machine descriptions.
@@ -126,19 +141,19 @@ DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
    There must be a 1 to 1 correspondence between these sets of classes in
    all operands for an instruction.
    */
-DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm')
+DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", RTX_MATCH)
 
 /* Appears only in machine descriptions.
    Means match a SCRATCH or a register.  When used to generate rtl, a
    SCRATCH is generated.  As for MATCH_OPERAND, the mode specifies
    the desired mode and the first argument is the operand number.
    The second argument is the constraint.  */
-DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm')
+DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", RTX_MATCH)
 
 /* Appears only in machine descriptions.
    Means match only something equal to what is stored in the operand table
    at the index specified by the argument.  */
-DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
+DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", RTX_MATCH)
 
 /* Appears only in machine descriptions.
    Means apply a predicate, AND match recursively the operands of the rtx.
@@ -146,7 +161,7 @@ DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
    Operand 1 is a predicate to apply (as a string, a function name).
    Operand 2 is a vector of expressions, each of which must match
    one subexpression of the rtx this construct is matching.  */
-DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
+DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", RTX_MATCH)
 
 /* Appears only in machine descriptions.
    Means to match a PARALLEL of arbitrary length.  The predicate is applied
@@ -155,17 +170,17 @@ DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
    Operand 1 is a predicate to apply to the PARALLEL.
    Operand 2 is a vector of expressions, each of which must match the 
    corresponding element in the PARALLEL.  */
-DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm')
+DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", RTX_MATCH)
 
 /* Appears only in machine descriptions.
    Means match only something equal to what is stored in the operand table
    at the index specified by the argument.  For MATCH_OPERATOR.  */
-DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm')
+DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", RTX_MATCH)
 
 /* Appears only in machine descriptions.
    Means match only something equal to what is stored in the operand table
    at the index specified by the argument.  For MATCH_PARALLEL.  */
-DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm')
+DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", RTX_MATCH)
 
 /* Appears only in machine descriptions.
    Defines the pattern for one kind of instruction.
@@ -184,7 +199,7 @@ DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm')
       template to use.
    4: optionally, a vector of attributes for this insn.
      */
-DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", 'x')
+DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", RTX_EXTRA)
 
 /* Definition of a peephole optimization.
    1st operand: vector of insn patterns to match
@@ -192,7 +207,7 @@ DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEsTV", 'x')
    3rd operand: template or C code to produce assembler output.
    4: optionally, a vector of attributes for this insn.
      */
-DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", 'x')
+DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", RTX_EXTRA)
 
 /* Definition of a split operation.
    1st operand: insn pattern to match
@@ -203,7 +218,7 @@ DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EsTV", 'x')
 	elements of `recog_data.operand' for use by the vector of
 	insn-patterns.
 	(`operands' is an alias here for `recog_data.operand').  */
-DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
+DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", RTX_EXTRA)
 
 /* Definition of an insn and associated split.
    This is the concatenation, with a few modifications, of a define_insn
@@ -231,11 +246,11 @@ DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
 	insn-patterns.
 	(`operands' is an alias here for `recog_data.operand').  
    7: optionally, a vector of attributes for this insn.  */
-DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", 'x')
+DEF_RTL_EXPR(DEFINE_INSN_AND_SPLIT, "define_insn_and_split", "sEsTsESV", RTX_EXTRA)
 
 /* Definition of an RTL peephole operation.
    Follows the same arguments as define_split.  */
-DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", 'x')
+DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", RTX_EXTRA)
 
 /* Define how to generate multiple insns for a standard insn name.
    1st operand: the insn name.
@@ -248,7 +263,7 @@ DEF_RTL_EXPR(DEFINE_PEEPHOLE2, "define_peephole2", "EsES", 'x')
 	elements of `recog_data.operand' for use by the vector of
 	insn-patterns.
 	(`operands' is an alias here for `recog_data.operand').  */
-DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
+DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA)
    
 /* Define a requirement for delay slots.
    1st operand: Condition involving insn attributes that, if true,
@@ -264,7 +279,7 @@ DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
 
    Multiple DEFINE_DELAYs may be present.  They indicate differing
    requirements for delay slots.  */
-DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
+DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", RTX_EXTRA)
 
 /* Define a set of insns that requires a function unit.  This means that
    these insns produce their result after a delay and that there may be
@@ -305,10 +320,10 @@ DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
 		the insn can be immediately scheduled (subject to the limit
 		on the number of simultaneous operations executing on the
 		unit.)  */
-DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x')
+DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", RTX_EXTRA)
 
 /* Define attribute computation for `asm' instructions.  */
-DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
+DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", RTX_EXTRA)
 
 /* Definition of a conditional execution meta operation.  Automatically
    generates new instances of DEFINE_INSN, selected by having attribute
@@ -321,16 +336,16 @@ DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
    1: A C expression giving an additional condition for recognizing
       the generated pattern.
    2: A template or C code to produce assembler output.  */
-DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", 'x')
+DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", RTX_EXTRA)
 
 /* SEQUENCE appears in the result of a `gen_...' function
    for a DEFINE_EXPAND that wants to make several insns.
    Its elements are the bodies of the insns that should be made.
    `emit_insn' takes the SEQUENCE apart and makes separate insns.  */
-DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x')
+DEF_RTL_EXPR(SEQUENCE, "sequence", "E", RTX_EXTRA)
 
 /* Refers to the address of its argument.  This is only used in alias.c.  */
-DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
+DEF_RTL_EXPR(ADDRESS, "address", "e", RTX_MATCH)
 
 /* ----------------------------------------------------------------------
    Constructions for CPU pipeline description described by NDFAs.
@@ -346,12 +361,12 @@ DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
    All define_reservations, define_cpu_units, and
    define_query_cpu_units should have unique names which may not be
    "nothing".  */
-DEF_RTL_EXPR(DEFINE_CPU_UNIT, "define_cpu_unit", "sS", 'x')
+DEF_RTL_EXPR(DEFINE_CPU_UNIT, "define_cpu_unit", "sS", RTX_EXTRA)
 
 /* (define_query_cpu_unit string [string]) describes cpu functional
    units analogously to define_cpu_unit.  The reservation of such
    units can be queried for automaton state.  */
-DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", 'x')
+DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", RTX_EXTRA)
 
 /* (exclusion_set string string) means that each CPU functional unit
    in the first string can not be reserved simultaneously with any
@@ -361,7 +376,7 @@ DEF_RTL_EXPR(DEFINE_QUERY_CPU_UNIT, "define_query_cpu_unit", "sS", 'x')
    unit which can execute simultaneously only single floating point
    insns or only double floating point insns.  All CPU functional
    units in a set should belong to the same automaton.  */
-DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", 'x')
+DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", RTX_EXTRA)
 
 /* (presence_set string string) means that each CPU functional unit in
    the first string can not be reserved unless at least one of pattern
@@ -383,7 +398,7 @@ DEF_RTL_EXPR(EXCLUSION_SET, "exclusion_set", "ss", 'x')
 
    All CPU functional units in a set should belong to the same
    automaton.  */
-DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", 'x')
+DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", RTX_EXTRA)
 
 /* (final_presence_set string string) is analogous to `presence_set'.
    The difference between them is when checking is done.  When an
@@ -404,7 +419,7 @@ DEF_RTL_EXPR(PRESENCE_SET, "presence_set", "ss", 'x')
       (define_reservation "insn_and_nop" "slot0 + slot1")
 
    but it can be issued if we use analogous `final_presence_set'.  */
-DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", 'x')
+DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", RTX_EXTRA)
 
 /* (absence_set string string) means that each CPU functional unit in
    the first string can be reserved only if each pattern of units
@@ -427,12 +442,12 @@ DEF_RTL_EXPR(FINAL_PRESENCE_SET, "final_presence_set", "ss", 'x')
 
    All CPU functional units in a set should to belong the same
    automaton.  */
-DEF_RTL_EXPR(ABSENCE_SET, "absence_set", "ss", 'x')
+DEF_RTL_EXPR(ABSENCE_SET, "absence_set", "ss", RTX_EXTRA)
 
 /* (final_absence_set string string) is analogous to `absence_set' but
    checking is done on the result (state) reservation.  See comments
    for `final_presence_set'.  */
-DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", 'x')
+DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", RTX_EXTRA)
 
 /* (define_bypass number out_insn_names in_insn_names) names bypass
    with given latency (the first number) from insns given by the first
@@ -443,7 +458,7 @@ DEF_RTL_EXPR(FINAL_ABSENCE_SET, "final_absence_set", "ss", 'x')
    parameters.  If the function returns zero the bypass will be
    ignored for this case.  Additional guard is necessary to recognize
    complicated bypasses, e.g. when consumer is load address.  */
-DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", 'x')
+DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", RTX_EXTRA)
 
 /* (define_automaton string) describes names of automata generated and
    used for pipeline hazards recognition.  The names are separated by
@@ -452,7 +467,7 @@ DEF_RTL_EXPR(DEFINE_BYPASS, "define_bypass", "issS", 'x')
    automata, the summary size of the automata usually is less than the
    single one.  The automaton name is used in define_cpu_unit and
    define_query_cpu_unit.  All automata should have unique names.  */
-DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", 'x')
+DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", RTX_EXTRA)
 
 /* (automata_option string) describes option for generation of
    automata.  Currently there are the following options:
@@ -475,7 +490,7 @@ DEF_RTL_EXPR(DEFINE_AUTOMATON, "define_automaton", "s", 'x')
 
    o "progress" which means output of a progress bar showing how many
      states were generated so far for automaton being processed.  */
-DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", 'x')
+DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", RTX_EXTRA)
 
 /* (define_reservation string string) names reservation (the first
    string) of cpu functional units (the 2nd string).  Sometimes unit
@@ -484,7 +499,7 @@ DEF_RTL_EXPR(AUTOMATA_OPTION, "automata_option", "s", 'x')
    parameter) in regular expression in define_insn_reservation.  All
    define_reservations, define_cpu_units, and define_query_cpu_units
    should have unique names which may not be "nothing".  */
-DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", 'x')
+DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", RTX_EXTRA)
 
 /* (define_insn_reservation name default_latency condition regexpr)
    describes reservation of cpu functional units (the 3nd operand) for
@@ -532,7 +547,7 @@ DEF_RTL_EXPR(DEFINE_RESERVATION, "define_reservation", "ss", 'x')
 
        7. string "nothing" means no units reservation.  */
 
-DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", 'x')
+DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", RTX_EXTRA)
 
 /* ----------------------------------------------------------------------
    Expressions used for insn attributes.  These also do not appear in
@@ -543,10 +558,10 @@ DEF_RTL_EXPR(DEFINE_INSN_RESERVATION, "define_insn_reservation", "sies", 'x')
    1st operand: name of the attribute
    2nd operand: comma-separated list of possible attribute values
    3rd operand: expression for the default value of the attribute.  */
-DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x')
+DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", RTX_EXTRA)
 
 /* Marker for the name of an attribute.  */
-DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
+DEF_RTL_EXPR(ATTR, "attr", "s", RTX_EXTRA)
 
 /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
    in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
@@ -554,7 +569,7 @@ DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
 
    (set_attr "name" "value") is equivalent to
    (set (attr "name") (const_string "value"))  */
-DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
+DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", RTX_EXTRA)
 
 /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
    specify that attribute values are to be assigned according to the
@@ -569,16 +584,16 @@ DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
 				 (const_string "a3")])
    (set_attr "att" "a1,a2,a3")
  */
-DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x')
+DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", RTX_EXTRA)
 
 /* A conditional expression true if the value of the specified attribute of
    the current insn equals the specified value.  The first operand is the
    attribute name and the second is the comparison value.  */
-DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x')
+DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", RTX_EXTRA)
 
 /* A special case of the above representing a set of alternatives.  The first
    operand is bitmap of the set, the second one is the default value.  */
-DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", 'x')
+DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", RTX_EXTRA)
 
 /* A conditional expression which is true if the specified flag is
    true for the insn being scheduled in reorg.
@@ -588,7 +603,7 @@ DEF_RTL_EXPR(EQ_ATTR_ALT, "eq_attr_alt", "ii", 'x')
 
    forward, backward, very_likely, likely, very_unlikely, and unlikely.  */
 
-DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x')
+DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", RTX_EXTRA)
 
 /* ----------------------------------------------------------------------
    Expression types used for things in the instruction chain.
@@ -601,21 +616,21 @@ DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x')
    ---------------------------------------------------------------------- */
 
 /* An instruction that cannot jump.  */
-DEF_RTL_EXPR(INSN, "insn", "iuuBieiee", 'i')
+DEF_RTL_EXPR(INSN, "insn", "iuuBieiee", RTX_INSN)
 
 /* An instruction that can possibly jump.
    Fields ( rtx->u.fld[] ) have exact same meaning as INSN's.  */
-DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBieiee0", 'i')
+DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBieiee0", RTX_INSN)
 
 /* An instruction that can possibly call a subroutine
    but which will not change which instruction comes next
    in the current function.
    Field ( rtx->u.fld[9] ) is CALL_INSN_FUNCTION_USAGE.
    All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's.  */
-DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBieieee", 'i')
+DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBieieee", RTX_INSN)
 
 /* A marker that indicates that control will not flow through.  */
-DEF_RTL_EXPR(BARRIER, "barrier", "iuu000000", 'x')
+DEF_RTL_EXPR(BARRIER, "barrier", "iuu000000", RTX_EXTRA)
 
 /* Holds a label that is followed by instructions.
    Operand:
@@ -623,14 +638,14 @@ DEF_RTL_EXPR(BARRIER, "barrier", "iuu000000", 'x')
    5: is used in flow.c to point to the chain of label_ref's to this label.
    6: is a number that is unique in the entire compilation.
    7: is the user-given name of the label, if any.  */
-DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", 'x')
+DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", RTX_EXTRA)
 
 /* Say where in the code a source line starts, for symbol table's sake.
    Operand:
    4: filename, if line number > 0, note-specific data otherwise.
    5: line number if > 0, enum note_insn otherwise.
    6: unique number if line number == note_insn_deleted_label.  */
-DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", 'x')
+DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", RTX_EXTRA)
 
 /* ----------------------------------------------------------------------
    Top level constituents of INSN, JUMP_INSN and CALL_INSN.
@@ -643,10 +658,10 @@ DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", 'x')
    Semantics are that there are no side effects if the condition
    is false.  This pattern is created automatically by the if_convert
    pass run after reload or by target-specific splitters.  */
-DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", 'x')
+DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", RTX_EXTRA)
 
 /* Several operations to be done in parallel (perhaps under COND_EXEC).  */
-DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
+DEF_RTL_EXPR(PARALLEL, "parallel", "E", RTX_EXTRA)
 
 /* A string that is passed through to the assembler as input.
      One can obviously pass comments through by using the
@@ -654,7 +669,7 @@ DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
      These occur in an insn all by themselves as the PATTERN.
      They also appear inside an ASM_OPERANDS
      as a convenient way to hold a string.  */
-DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
+DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", RTX_EXTRA)
 
 /* An assembler instruction with operands.
    1st operand is the instruction template.
@@ -668,7 +683,7 @@ DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
      and whose mode indicates the mode of the input operand.
    6th is the name of the containing source file.
    7th is the source line number.  */
-DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
+DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", RTX_EXTRA)
 
 /* A machine-specific operation.
    1st operand is a vector of operands being used by the operation so that
@@ -679,14 +694,14 @@ DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
    genrecog.c record positions within an insn.)
    This can occur all by itself in a PATTERN, as a component of a PARALLEL,
    or inside an expression.  */
-DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x')
+DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", RTX_EXTRA)
 
 /* Similar, but a volatile operation and one which may trap.  */
-DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x')
+DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", RTX_EXTRA)
 
 /* Vector of addresses, stored as full words.  */
 /* Each element is a LABEL_REF to a CODE_LABEL whose address we want.  */
-DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
+DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA)
 
 /* Vector of address differences X0 - BASE, X1 - BASE, ...
    First operand is BASE; the vector contains the X's.
@@ -711,7 +726,7 @@ DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
    CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
    compilations.  */
      
-DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", 'x')
+DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA)
 
 /* Memory prefetch, with attributes supported on some targets.
    Operand 1 is the address of the memory to fetch.
@@ -722,7 +737,7 @@ DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", 'x')
 
    The attributes specified by operands 2 and 3 are ignored for targets
    whose prefetch instructions do not support them.  */
-DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", 'x')
+DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", RTX_EXTRA)
 
 /* ----------------------------------------------------------------------
    At the top level of an instruction (perhaps under PARALLEL).
@@ -734,69 +749,69 @@ DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", 'x')
    ALL assignment must use SET.
    Instructions that do multiple assignments must use multiple SET,
    under PARALLEL.  */
-DEF_RTL_EXPR(SET, "set", "ee", 'x')
+DEF_RTL_EXPR(SET, "set", "ee", RTX_EXTRA)
 
 /* Indicate something is used in a way that we don't want to explain.
    For example, subroutine calls will use the register
    in which the static chain is passed.  */
-DEF_RTL_EXPR(USE, "use", "e", 'x')
+DEF_RTL_EXPR(USE, "use", "e", RTX_EXTRA)
 
 /* Indicate something is clobbered in a way that we don't want to explain.
    For example, subroutine calls will clobber some physical registers
    (the ones that are by convention not saved).  */
-DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x')
+DEF_RTL_EXPR(CLOBBER, "clobber", "e", RTX_EXTRA)
 
 /* Call a subroutine.
    Operand 1 is the address to call.
    Operand 2 is the number of arguments.  */
 
-DEF_RTL_EXPR(CALL, "call", "ee", 'x')
+DEF_RTL_EXPR(CALL, "call", "ee", RTX_EXTRA)
 
 /* Return from a subroutine.  */
 
-DEF_RTL_EXPR(RETURN, "return", "", 'x')
+DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
 
 /* Conditional trap.
    Operand 1 is the condition.
    Operand 2 is the trap code.
    For an unconditional trap, make the condition (const_int 1).  */
-DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", 'x')
+DEF_RTL_EXPR(TRAP_IF, "trap_if", "ee", RTX_EXTRA)
 
 /* Placeholder for _Unwind_Resume before we know if a function call
    or a branch is needed.  Operand 1 is the exception region from
    which control is flowing.  */
-DEF_RTL_EXPR(RESX, "resx", "i", 'x')
+DEF_RTL_EXPR(RESX, "resx", "i", RTX_EXTRA)
 
 /* ----------------------------------------------------------------------
    Primitive values for use in expressions.
    ---------------------------------------------------------------------- */
 
 /* numeric integer constant */
-DEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o')
+DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ)
 
 /* numeric floating point constant.
    Operands hold the value.  They are all 'w' and there may be from 2 to 6;
    see real.h.  */
-DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, 'o')
+DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ)
 
 /* Describes a vector constant.  */
-DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", 'x')
+DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", RTX_EXTRA)
 
 /* String constant.  Used only for attributes right now.  */
-DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o')
+DEF_RTL_EXPR(CONST_STRING, "const_string", "s", RTX_OBJ)
 
 /* This is used to encapsulate an expression whose value is constant
    (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
    recognized as a constant operand rather than by arithmetic instructions.  */
 
-DEF_RTL_EXPR(CONST, "const", "e", 'o')
+DEF_RTL_EXPR(CONST, "const", "e", RTX_CONST_OBJ)
 
 /* program counter.  Ordinary jumps are represented
    by a SET whose first operand is (PC).  */
-DEF_RTL_EXPR(PC, "pc", "", 'o')
+DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ)
 
 /* Used in the cselib routines to describe a value.  */
-DEF_RTL_EXPR(VALUE, "value", "0", 'o')
+DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
 
 /* A register.  The "operand" is the register number, accessed with
    the REGNO macro.  If this number is less than FIRST_PSEUDO_REGISTER
@@ -805,14 +820,14 @@ DEF_RTL_EXPR(VALUE, "value", "0", 'o')
    pseudo register that got turned into a hard register.
    This rtx needs to have as many (or more) fields as a MEM, since we
    can change REG rtx's into MEMs during reload.  */
-DEF_RTL_EXPR(REG, "reg", "i00", 'o')
+DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ)
 
 /* A scratch register.  This represents a register used only within a
    single insn.  It will be turned into a REG during register allocation
    or reload unless the constraint indicates that the register won't be
    needed, in which case it can remain a SCRATCH.  This code is
    marked as having one operand so it can be turned into a REG.  */
-DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
+DEF_RTL_EXPR(SCRATCH, "scratch", "0", RTX_OBJ)
 
 /* One word of a multi-word value.
    The first operand is the complete value; the second says which word.
@@ -822,7 +837,7 @@ DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
    This is also used to refer to a value in a different machine mode.
    For example, it can be used to refer to a SImode value as if it were
    Qimode, or vice versa.  Then the word number is always 0.  */
-DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
+DEF_RTL_EXPR(SUBREG, "subreg", "ei", RTX_EXTRA)
 
 /* This one-argument rtx is used for move instructions
    that are guaranteed to alter only the low part of a destination.
@@ -835,38 +850,38 @@ DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
    but the register constraints may be tighter when STRICT_LOW_PART
    is in use.  */
 
-DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x')
+DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", RTX_EXTRA)
 
 /* (CONCAT a b) represents the virtual concatenation of a and b
    to make a value that has as many bits as a and b put together.
    This is used for complex values.  Normally it appears only
    in DECL_RTLs and during RTL generation, but not in the insn chain.  */
-DEF_RTL_EXPR(CONCAT, "concat", "ee", 'o')
+DEF_RTL_EXPR(CONCAT, "concat", "ee", RTX_OBJ)
 
 /* A memory location; operand is the address.  The second operand is the
    alias set to which this MEM belongs.  We use `0' instead of `w' for this
    field so that the field need not be specified in machine descriptions.  */
-DEF_RTL_EXPR(MEM, "mem", "e0", 'o')
+DEF_RTL_EXPR(MEM, "mem", "e0", RTX_OBJ)
 
 /* Reference to an assembler label in the code for this function.
    The operand is a CODE_LABEL found in the insn chain.
    The unprinted fields 1 and 2 are used in flow.c for the
    LABEL_NEXTREF and CONTAINING_INSN.  */
-DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o')
+DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", RTX_CONST_OBJ)
 
 /* Reference to a named label: 
    Operand 0: label name
    Operand 1: flags (see SYMBOL_FLAG_* in rtl.h)
    Operand 2: tree from which this symbol is derived, or null.
    This is either a DECL node, or some kind of constant.  */
-DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", 'o')
+DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", RTX_CONST_OBJ)
 
 /* The condition code register is represented, in our imagination,
    as a register holding a value that can be compared to zero.
    In fact, the machine has already compared them and recorded the
    results; but instructions that look at the condition code
    pretend to be looking at the entire value and comparing it.  */
-DEF_RTL_EXPR(CC0, "cc0", "", 'o')
+DEF_RTL_EXPR(CC0, "cc0", "", RTX_OBJ)
 
 /* Reference to the address of a register.  Removed by purge_addressof after
    CSE has elided as many as possible.
@@ -875,7 +890,7 @@ DEF_RTL_EXPR(CC0, "cc0", "", 'o')
    3rd operand: the decl for the object in the register, for
      put_reg_in_stack.  */
 
-DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", 'o')
+DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", RTX_OBJ)
 
 /* =====================================================================
    A QUEUED expression really points to a member of the queue of instructions
@@ -893,7 +908,7 @@ DEF_RTL_EXPR(ADDRESSOF, "addressof", "eit", 'o')
    4. the next QUEUED expression in the queue.
    ====================================================================== */
 
-DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
+DEF_RTL_EXPR(QUEUED, "queued", "eeeee", RTX_EXTRA)
 
 /* ----------------------------------------------------------------------
    Expressions for operators in an rtl pattern
@@ -905,7 +920,7 @@ DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
      0:  condition
      1:  then expr
      2:  else expr */
-DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
+DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", RTX_TERNARY)
 
 /* General conditional. The first operand is a vector composed of pairs of
    expressions.  The first element of each pair is evaluated, in turn.
@@ -914,57 +929,57 @@ DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
    true, the second operand will be used as the value of the conditional.
 
    This should be replaced with use of IF_THEN_ELSE.  */
-DEF_RTL_EXPR(COND, "cond", "Ee", 'x')
+DEF_RTL_EXPR(COND, "cond", "Ee", RTX_EXTRA)
 
 /* Comparison, produces a condition code result.  */
-DEF_RTL_EXPR(COMPARE, "compare", "ee", '2')
+DEF_RTL_EXPR(COMPARE, "compare", "ee", RTX_BIN_ARITH)
 
 /* plus */
-DEF_RTL_EXPR(PLUS, "plus", "ee", 'c')
+DEF_RTL_EXPR(PLUS, "plus", "ee", RTX_COMM_ARITH)
 
 /* Operand 0 minus operand 1.  */
-DEF_RTL_EXPR(MINUS, "minus", "ee", '2')
+DEF_RTL_EXPR(MINUS, "minus", "ee", RTX_BIN_ARITH)
 
 /* Minus operand 0.  */
-DEF_RTL_EXPR(NEG, "neg", "e", '1')
+DEF_RTL_EXPR(NEG, "neg", "e", RTX_UNARY)
 
-DEF_RTL_EXPR(MULT, "mult", "ee", 'c')
+DEF_RTL_EXPR(MULT, "mult", "ee", RTX_COMM_ARITH)
 
 /* Operand 0 divided by operand 1.  */
-DEF_RTL_EXPR(DIV, "div", "ee", '2')
+DEF_RTL_EXPR(DIV, "div", "ee", RTX_BIN_ARITH)
 /* Remainder of operand 0 divided by operand 1.  */
-DEF_RTL_EXPR(MOD, "mod", "ee", '2')
+DEF_RTL_EXPR(MOD, "mod", "ee", RTX_BIN_ARITH)
 
 /* Unsigned divide and remainder.  */
-DEF_RTL_EXPR(UDIV, "udiv", "ee", '2')
-DEF_RTL_EXPR(UMOD, "umod", "ee", '2')
+DEF_RTL_EXPR(UDIV, "udiv", "ee", RTX_BIN_ARITH)
+DEF_RTL_EXPR(UMOD, "umod", "ee", RTX_BIN_ARITH)
 
 /* Bitwise operations.  */
-DEF_RTL_EXPR(AND, "and", "ee", 'c')
+DEF_RTL_EXPR(AND, "and", "ee", RTX_COMM_ARITH)
 
-DEF_RTL_EXPR(IOR, "ior", "ee", 'c')
+DEF_RTL_EXPR(IOR, "ior", "ee", RTX_COMM_ARITH)
 
-DEF_RTL_EXPR(XOR, "xor", "ee", 'c')
+DEF_RTL_EXPR(XOR, "xor", "ee", RTX_COMM_ARITH)
 
-DEF_RTL_EXPR(NOT, "not", "e", '1')
+DEF_RTL_EXPR(NOT, "not", "e", RTX_UNARY)
 
 /* Operand:
      0:  value to be shifted.
      1:  number of bits.  */
-DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2') /* shift left */
-DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2') /* rotate left */
-DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2') /* arithmetic shift right */
-DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2') /* logical shift right */
-DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2') /* rotate right */
+DEF_RTL_EXPR(ASHIFT, "ashift", "ee", RTX_BIN_ARITH) /* shift left */
+DEF_RTL_EXPR(ROTATE, "rotate", "ee", RTX_BIN_ARITH) /* rotate left */
+DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", RTX_BIN_ARITH) /* arithmetic shift right */
+DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", RTX_BIN_ARITH) /* logical shift right */
+DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", RTX_BIN_ARITH) /* rotate right */
 
 /* Minimum and maximum values of two operands.  We need both signed and
    unsigned forms.  (We cannot use MIN for SMIN because it conflicts
    with a macro of the same name.) */
 
-DEF_RTL_EXPR(SMIN, "smin", "ee", 'c')
-DEF_RTL_EXPR(SMAX, "smax", "ee", 'c')
-DEF_RTL_EXPR(UMIN, "umin", "ee", 'c')
-DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
+DEF_RTL_EXPR(SMIN, "smin", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(SMAX, "smax", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(UMIN, "umin", "ee", RTX_COMM_ARITH)
+DEF_RTL_EXPR(UMAX, "umax", "ee", RTX_COMM_ARITH)
 
 /* These unary operations are used to represent incrementation
    and decrementation as they occur in memory addresses.
@@ -973,10 +988,10 @@ DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
    containing MEM.  These operations exist in only two cases:
    1. pushes onto the stack.
    2. created automatically by the life_analysis pass in flow.c.  */
-DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'a')
-DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'a')
-DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'a')
-DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'a')
+DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", RTX_AUTOINC)
+DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", RTX_AUTOINC)
+DEF_RTL_EXPR(POST_DEC, "post_dec", "e", RTX_AUTOINC)
+DEF_RTL_EXPR(POST_INC, "post_inc", "e", RTX_AUTOINC)
 
 /* These binary operations are used to represent generic address
    side-effects in memory addresses, except for simple incrementation
@@ -990,53 +1005,53 @@ DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'a')
    form (plus (reg) (reg)) and (plus (reg) (const_int)), where
    the first operand of the PLUS has to be the same register as
    the first operand of the *_MODIFY.  */
-DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", 'a')
-DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", 'a')
+DEF_RTL_EXPR(PRE_MODIFY, "pre_modify", "ee", RTX_AUTOINC)
+DEF_RTL_EXPR(POST_MODIFY, "post_modify", "ee", RTX_AUTOINC)
 
 /* Comparison operations.  The ordered comparisons exist in two
    flavors, signed and unsigned.  */
-DEF_RTL_EXPR(NE, "ne", "ee", '<')
-DEF_RTL_EXPR(EQ, "eq", "ee", '<')
-DEF_RTL_EXPR(GE, "ge", "ee", '<')
-DEF_RTL_EXPR(GT, "gt", "ee", '<')
-DEF_RTL_EXPR(LE, "le", "ee", '<')
-DEF_RTL_EXPR(LT, "lt", "ee", '<')
-DEF_RTL_EXPR(GEU, "geu", "ee", '<')
-DEF_RTL_EXPR(GTU, "gtu", "ee", '<')
-DEF_RTL_EXPR(LEU, "leu", "ee", '<')
-DEF_RTL_EXPR(LTU, "ltu", "ee", '<')
+DEF_RTL_EXPR(NE, "ne", "ee", RTX_COMM_COMPARE)
+DEF_RTL_EXPR(EQ, "eq", "ee", RTX_COMM_COMPARE)
+DEF_RTL_EXPR(GE, "ge", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(GT, "gt", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(LE, "le", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(LT, "lt", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(GEU, "geu", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(GTU, "gtu", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(LEU, "leu", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(LTU, "ltu", "ee", RTX_COMPARE)
 
 /* Additional floating point unordered comparison flavors.  */
-DEF_RTL_EXPR(UNORDERED, "unordered", "ee", '<')
-DEF_RTL_EXPR(ORDERED, "ordered", "ee", '<')
+DEF_RTL_EXPR(UNORDERED, "unordered", "ee", RTX_COMM_COMPARE)
+DEF_RTL_EXPR(ORDERED, "ordered", "ee", RTX_COMM_COMPARE)
 
 /* These are equivalent to unordered or ...  */
-DEF_RTL_EXPR(UNEQ, "uneq", "ee", '<')
-DEF_RTL_EXPR(UNGE, "unge", "ee", '<')
-DEF_RTL_EXPR(UNGT, "ungt", "ee", '<')
-DEF_RTL_EXPR(UNLE, "unle", "ee", '<')
-DEF_RTL_EXPR(UNLT, "unlt", "ee", '<')
+DEF_RTL_EXPR(UNEQ, "uneq", "ee", RTX_COMM_COMPARE)
+DEF_RTL_EXPR(UNGE, "unge", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(UNGT, "ungt", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(UNLE, "unle", "ee", RTX_COMPARE)
+DEF_RTL_EXPR(UNLT, "unlt", "ee", RTX_COMPARE)
 
 /* This is an ordered NE, ie !UNEQ, ie false for NaN.  */
-DEF_RTL_EXPR(LTGT, "ltgt", "ee", '<')
+DEF_RTL_EXPR(LTGT, "ltgt", "ee", RTX_COMM_COMPARE)
 
 /* Represents the result of sign-extending the sole operand.
    The machine modes of the operand and of the SIGN_EXTEND expression
    determine how much sign-extension is going on.  */
-DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1')
+DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", RTX_UNARY)
 
 /* Similar for zero-extension (such as unsigned short to int).  */
-DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1')
+DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", RTX_UNARY)
 
 /* Similar but here the operand has a wider mode.  */
-DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1')
+DEF_RTL_EXPR(TRUNCATE, "truncate", "e", RTX_UNARY)
 
 /* Similar for extending floating-point values (such as SFmode to DFmode).  */
-DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1')
-DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1')
+DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", RTX_UNARY)
+DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", RTX_UNARY)
 
 /* Conversion of fixed point operand to floating point value.  */
-DEF_RTL_EXPR(FLOAT, "float", "e", '1')
+DEF_RTL_EXPR(FLOAT, "float", "e", RTX_UNARY)
 
 /* With fixed-point machine mode:
    Conversion of floating point operand to fixed point value.
@@ -1044,38 +1059,38 @@ DEF_RTL_EXPR(FLOAT, "float", "e", '1')
    With floating-point machine mode (and operand with same mode):
    Operand is rounded toward zero to produce an integer value
    represented in floating point.  */
-DEF_RTL_EXPR(FIX, "fix", "e", '1')
+DEF_RTL_EXPR(FIX, "fix", "e", RTX_UNARY)
 
 /* Conversion of unsigned fixed point operand to floating point value.  */
-DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1')
+DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", RTX_UNARY)
 
 /* With fixed-point machine mode:
    Conversion of floating point operand to *unsigned* fixed point value.
    Value is defined only when the operand's value is an integer.  */
-DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1')
+DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", RTX_UNARY)
 
 /* Absolute value */
-DEF_RTL_EXPR(ABS, "abs", "e", '1')
+DEF_RTL_EXPR(ABS, "abs", "e", RTX_UNARY)
 
 /* Square root */
-DEF_RTL_EXPR(SQRT, "sqrt", "e", '1')
+DEF_RTL_EXPR(SQRT, "sqrt", "e", RTX_UNARY)
 
 /* Find first bit that is set.
    Value is 1 + number of trailing zeros in the arg.,
    or 0 if arg is 0.  */
-DEF_RTL_EXPR(FFS, "ffs", "e", '1')
+DEF_RTL_EXPR(FFS, "ffs", "e", RTX_UNARY)
 
 /* Count leading zeros.  */
-DEF_RTL_EXPR(CLZ, "clz", "e", '1')
+DEF_RTL_EXPR(CLZ, "clz", "e", RTX_UNARY)
 
 /* Count trailing zeros.  */
-DEF_RTL_EXPR(CTZ, "ctz", "e", '1')
+DEF_RTL_EXPR(CTZ, "ctz", "e", RTX_UNARY)
 
 /* Population count (number of 1 bits).  */
-DEF_RTL_EXPR(POPCOUNT, "popcount", "e", '1')
+DEF_RTL_EXPR(POPCOUNT, "popcount", "e", RTX_UNARY)
 
 /* Population parity (number of 1 bits modulo 2).  */
-DEF_RTL_EXPR(PARITY, "parity", "e", '1')
+DEF_RTL_EXPR(PARITY, "parity", "e", RTX_UNARY)
 
 /* Reference to a signed bit-field of specified size and position.
    Operand 0 is the memory unit (usually SImode or QImode) which
@@ -1086,19 +1101,19 @@ DEF_RTL_EXPR(PARITY, "parity", "e", '1')
    operand 2 counts from the msb of the memory unit.
    Otherwise, the first bit is the lsb and operand 2 counts from
    the lsb of the memory unit.  */
-DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b')
+DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", RTX_BITFIELD_OPS)
 
 /* Similar for unsigned bit-field.  */
-DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b')
+DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", RTX_BITFIELD_OPS)
 
 /* For RISC machines.  These save memory when splitting insns.  */
 
 /* HIGH are the high-order bits of a constant expression.  */
-DEF_RTL_EXPR(HIGH, "high", "e", 'o')
+DEF_RTL_EXPR(HIGH, "high", "e", RTX_CONST_OBJ)
 
 /* LO_SUM is the sum of a register and the low-order bits
    of a constant expression.  */
-DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
+DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", RTX_OBJ)
 
 /* Header for range information.  Operand 0 is the NOTE_INSN_RANGE_BEG insn.
    Operand 1 is the NOTE_INSN_RANGE_END insn.  Operand 2 is a vector of all of
@@ -1111,7 +1126,7 @@ DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
    is a bitmap of the registers live at the end of the range.  Operand 11 is
    marker number for the start of the range.  Operand 12 is the marker number
    for the end of the range.  */
-DEF_RTL_EXPR(RANGE_INFO, "range_info", "uuEiiiiiibbii", 'x')
+DEF_RTL_EXPR(RANGE_INFO, "range_info", "uuEiiiiiibbii", RTX_EXTRA)
 
 /* Registers that can be substituted within the range.  Operand 0 is the
    original pseudo register number.  Operand 1 will be filled in with the
@@ -1126,22 +1141,22 @@ DEF_RTL_EXPR(RANGE_INFO, "range_info", "uuEiiiiiibbii", 'x')
    across.  Operand 8 is the symbol node of the variable if the register is a
    user variable.  Operand 9 is the block node that the variable is declared
    in if the register is a user variable.  */
-DEF_RTL_EXPR(RANGE_REG, "range_reg", "iiiiiiiitt", 'x')
+DEF_RTL_EXPR(RANGE_REG, "range_reg", "iiiiiiiitt", RTX_EXTRA)
 
 /* Information about a local variable's ranges.  Operand 0 is an EXPR_LIST of
    the different ranges a variable is in where it is copied to a different
    pseudo register.  Operand 1 is the block that the variable is declared in.
    Operand 2 is the number of distinct ranges.  */
-DEF_RTL_EXPR(RANGE_VAR, "range_var", "eti", 'x')
+DEF_RTL_EXPR(RANGE_VAR, "range_var", "eti", RTX_EXTRA)
 
 /* Information about the registers that are live at the current point.  Operand
    0 is the live bitmap.  Operand 1 is the original block number.  */
-DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", 'x')
+DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", RTX_EXTRA)
 
 /* A unary `__builtin_constant_p' expression.  These are only emitted
    during RTL generation, and then only if optimize > 0.  They are
    eliminated by the first CSE pass.  */
-DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
+DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", RTX_EXTRA)
 
 /* A placeholder for a CALL_INSN which may be turned into a normal call,
    a sibling (tail) call or tail recursion.
@@ -1162,49 +1177,49 @@ DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
 
    This method of tail-call elimination is intended to be replaced by
    tree-based optimizations once front-end conversions are complete.  */
-DEF_RTL_EXPR(CALL_PLACEHOLDER, "call_placeholder", "uuuu", 'x')
+DEF_RTL_EXPR(CALL_PLACEHOLDER, "call_placeholder", "uuuu", RTX_EXTRA)
 
 /* Describes a merge operation between two vector values.
    Operands 0 and 1 are the vectors to be merged, operand 2 is a bitmask
    that specifies where the parts of the result are taken from.  Set bits
    indicate operand 0, clear bits indicate operand 1.  The parts are defined
    by the mode of the vectors.  */
-DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", '3')
+DEF_RTL_EXPR(VEC_MERGE, "vec_merge", "eee", RTX_TERNARY)
 
 /* Describes an operation that selects parts of a vector.
    Operands 0 is the source vector, operand 1 is a PARALLEL that contains
    a CONST_INT for each of the subparts of the result vector, giving the
    number of the source subpart that should be stored into it.  */
-DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", '2')
+DEF_RTL_EXPR(VEC_SELECT, "vec_select", "ee", RTX_BIN_ARITH)
 
 /* Describes a vector concat operation.  Operands 0 and 1 are the source
    vectors, the result is a vector that is as long as operands 0 and 1
    combined and is the concatenation of the two source vectors.  */
-DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", '2')
+DEF_RTL_EXPR(VEC_CONCAT, "vec_concat", "ee", RTX_BIN_ARITH)
 
 /* Describes an operation that converts a small vector into a larger one by
    duplicating the input values.  The output vector mode must have the same
    submodes as the input vector mode, and the number of output parts must be
    an integer multiple of the number of input parts.  */
-DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", '1')
+DEF_RTL_EXPR(VEC_DUPLICATE, "vec_duplicate", "e", RTX_UNARY)
      
 /* Addition with signed saturation */
-DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", 'c')
+DEF_RTL_EXPR(SS_PLUS, "ss_plus", "ee", RTX_COMM_ARITH)
 
 /* Addition with unsigned saturation */
-DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", 'c')
+DEF_RTL_EXPR(US_PLUS, "us_plus", "ee", RTX_COMM_ARITH)
 
 /* Operand 0 minus operand 1, with signed saturation.  */
-DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", '2')
+DEF_RTL_EXPR(SS_MINUS, "ss_minus", "ee", RTX_BIN_ARITH)
 
 /* Operand 0 minus operand 1, with unsigned saturation.  */
-DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", '2')
+DEF_RTL_EXPR(US_MINUS, "us_minus", "ee", RTX_BIN_ARITH)
 
 /* Signed saturating truncate.  */
-DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", '1')
+DEF_RTL_EXPR(SS_TRUNCATE, "ss_truncate", "e", RTX_UNARY)
 
 /* Unsigned saturating truncate.  */
-DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", '1')
+DEF_RTL_EXPR(US_TRUNCATE, "us_truncate", "e", RTX_UNARY)
 
 /* Information about the variable and its location.  */
 DEF_RTL_EXPR(VAR_LOCATION, "var_location", "te", 'x')