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| author | Paul A. Clarke <pc@us.ibm.com> | 2021-08-09 13:08:25 -0500 |
|---|---|---|
| committer | Paul A. Clarke <pc@us.ibm.com> | 2021-10-19 10:36:59 -0500 |
| commit | 3cfbe5dc08b574bccc398256946cc03e2a767329 (patch) | |
| tree | 25a448674949dd45ac06840a415b6f9a404727ed /gcc/rtl.c | |
| parent | ce8add4b0e086e671a7e08503408356ad6beee7f (diff) | |
| download | gcc-3cfbe5dc08b574bccc398256946cc03e2a767329.zip gcc-3cfbe5dc08b574bccc398256946cc03e2a767329.tar.gz gcc-3cfbe5dc08b574bccc398256946cc03e2a767329.tar.bz2 | |
rs6000: Guard some x86 intrinsics implementations
Some compatibility implementations of x86 intrinsics include
Power intrinsics which require POWER8. Guard them.
emmintrin.h:
- _mm_cmpord_pd: Remove code which was ostensibly for pre-POWER8,
but which indeed depended on POWER8 (vec_cmpgt(v2du)/vcmpgtud).
The "POWER8" version works fine on pre-POWER8.
- _mm_mul_epu32: vec_mule(v4su) uses vmuleuw.
pmmintrin.h:
- _mm_movehdup_ps: vec_mergeo(v4su) uses vmrgow.
- _mm_moveldup_ps: vec_mergee(v4su) uses vmrgew.
smmintrin.h:
- _mm_cmpeq_epi64: vec_cmpeq(v2di) uses vcmpequd.
- _mm_mul_epi32: vec_mule(v4si) uses vmuluwm.
- _mm_cmpgt_epi64: vec_cmpgt(v2di) uses vcmpgtsd.
tmmintrin.h:
- _mm_sign_epi8: vec_neg(v4si) uses vsububm.
- _mm_sign_epi16: vec_neg(v4si) uses vsubuhm.
- _mm_sign_epi32: vec_neg(v4si) uses vsubuwm.
Note that the above three could actually be supported pre-POWER8,
but current GCC does not support them before POWER8.
- _mm_sign_pi8: depends on _mm_sign_epi8.
- _mm_sign_pi16: depends on _mm_sign_epi16.
- _mm_sign_pi32: depends on _mm_sign_epi32.
sse4_2-pcmpgtq.c:
- _mm_cmpgt_epi64: vec_cmpeq(v2di) uses vcmpequd.
2021-10-19 Paul A. Clarke <pc@us.ibm.com>
gcc
PR target/101893
PR target/102719
* config/rs6000/emmintrin.h: Guard POWER8 intrinsics.
* config/rs6000/pmmintrin.h: Same.
* config/rs6000/smmintrin.h: Same.
* config/rs6000/tmmintrin.h: Same.
gcc/testsuite
* gcc.target/powerpc/sse4_2-pcmpgtq.c: Tighten dg constraints
to minimally Power8.
Diffstat (limited to 'gcc/rtl.c')
0 files changed, 0 insertions, 0 deletions