dbr: Filter-out TARGET_FLAGS_REGNUM from end_of_function_needs.

Compared to the cc0 version, I noticed a regression in
delay-slot-filling for CRIS for several functions in libgcc with
a similar layout, one being lshrdi3, where with cc0 all
delay-slots were filled, as exposed by the test-case in
gcc.target/cris/pr93372-1.c.

There's one slot that fails to be filled for the decc0rated CRIS
port.  A gdb session shows it is because of the automatic
inclusion of TARGET_FLAGS_REGNUM in "registers needed at the end
of the function" because there are insns in the epilogue that
clobber the condition-code register.  I'm not trying to tell a
clobber from a set, as parallels with set instead of clobber
seems likely to happen too, for targets with TARGET_FLAGS_REGNUM
set.

Other targets with delay-slots and one dedicated often-clobbered
condition-code-register should consider defining
TARGET_FLAGS_REGNUM.  I noticed it improved delay-slot-filling
also in other situations than this.

(Previously approved by Jeff Law.)

gcc:
	* resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
	from end_of_function_needs.

1 files changed, 6 insertions, 0 deletions

diff --git a/gcc/resource.c b/gcc/resource.c
index 32faa73..0a9d594 100644
--- a/gcc/resource.c
+++ b/gcc/resource.c
@@ -21,6 +21,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "system.h"
 #include "coretypes.h"
 #include "backend.h"
+#include "target.h"
 #include "rtl.h"
 #include "df.h"
 #include "memmodel.h"
@@ -1215,6 +1216,11 @@ init_resource_info (rtx_insn *epilogue_insn)
 	break;
     }
 
+  /* Filter-out the flags register from those additionally required
+     registers. */
+  if (targetm.flags_regnum != INVALID_REGNUM)
+    CLEAR_HARD_REG_BIT (end_of_function_needs.regs, targetm.flags_regnum);
+
   /* Allocate and initialize the tables used by mark_target_live_regs.  */
   target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME);
   bb_ticks = XCNEWVEC (int, last_basic_block_for_fn (cfun));