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| author | Eric Botcazou <ebotcazou@adacore.com> | 2019-07-12 10:15:39 +0000 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2019-07-12 10:15:39 +0000 |
| commit | 49dbd6a0325f510af43b05bc0b91426779b4ed59 (patch) | |
| tree | 219431365adbc550268ee861300f0c8b2fa5556b /gcc/resource.c | |
| parent | 831e688af50c5f77a2daa3cd3bfd0f27d54d5d72 (diff) | |
| download | gcc-49dbd6a0325f510af43b05bc0b91426779b4ed59.zip gcc-49dbd6a0325f510af43b05bc0b91426779b4ed59.tar.gz gcc-49dbd6a0325f510af43b05bc0b91426779b4ed59.tar.bz2 | |
re PR rtl-optimization/91136 (incorrect move of instruction to delay slot causes application crash in exception handling)
PR rtl-optimization/91136
* df-core.c (ACCESSING REFS): Fix typos in comment.
* resource.c (mark_target_live_reg): Add artificial defs that occur at
the beginning of the block to the initial set of live registers.
From-SVN: r273436
Diffstat (limited to 'gcc/resource.c')
| -rw-r--r-- | gcc/resource.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/gcc/resource.c b/gcc/resource.c index f8a23ed..c4bcfd7 100644 --- a/gcc/resource.c +++ b/gcc/resource.c @@ -987,9 +987,13 @@ mark_target_live_regs (rtx_insn *insns, rtx target_maybe_return, struct resource { regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b)); rtx_insn *start_insn, *stop_insn; + df_ref def; /* Compute hard regs live at start of block. */ REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live); + FOR_EACH_ARTIFICIAL_DEF (def, b) + if (DF_REF_FLAGS (def) & DF_REF_AT_TOP) + SET_HARD_REG_BIT (current_live_regs, DF_REF_REGNO (def)); /* Get starting and ending insn, handling the case where each might be a SEQUENCE. */ |