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author | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2020-03-13 09:58:44 +0100 |
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committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2020-03-13 10:03:30 +0100 |
commit | 3e6ab5cefa81165e90fb62abf50e515f85a17e9a (patch) | |
tree | 83673fa186fe53cda48fbd1dc671d68115091816 /gcc/reorg.c | |
parent | 82f620e2ba4c440c5e89bb1f73d10a11ed0f2eb4 (diff) | |
download | gcc-3e6ab5cefa81165e90fb62abf50e515f85a17e9a.zip gcc-3e6ab5cefa81165e90fb62abf50e515f85a17e9a.tar.gz gcc-3e6ab5cefa81165e90fb62abf50e515f85a17e9a.tar.bz2 |
Fix incorrect filling of delay slots in branchy code at -O2
The issue is that relax_delay_slots can streamline the CFG in some cases,
in particular remove BARRIERs, but removing BARRIERs changes the way the
instructions are associated with (basic) blocks by the liveness analysis
code in resource.c (find_basic_block) and thus can cause entries in the
cache maintained by resource.c to become outdated, thus producing wrong
answers downstream.
The fix is to invalidate the cache entries affected by the removal of
BARRIERs in relax_delay_slots, i.e. for the instructions down to the
next BARRIER.
PR rtl-optimization/94119
* resource.h (clear_hashed_info_until_next_barrier): Declare.
* resource.c (clear_hashed_info_until_next_barrier): New function.
* reorg.c (add_to_delay_list): Fix formatting.
(relax_delay_slots): Call clear_hashed_info_until_next_barrier on
the next instruction after removing a BARRIER.
Diffstat (limited to 'gcc/reorg.c')
-rw-r--r-- | gcc/reorg.c | 26 |
1 files changed, 19 insertions, 7 deletions
diff --git a/gcc/reorg.c b/gcc/reorg.c index dfd7494..84beb93 100644 --- a/gcc/reorg.c +++ b/gcc/reorg.c @@ -575,8 +575,9 @@ add_to_delay_list (rtx_insn *insn, vec<rtx_insn *> *delay_list) { /* If INSN has its block number recorded, clear it since we may be moving the insn to a new block. */ - clear_hashed_info_for_insn (insn); - delay_list->safe_push (insn); + clear_hashed_info_for_insn (insn); + + delay_list->safe_push (insn); } /* Delete INSN from the delay slot of the insn that it is in, which may @@ -3211,7 +3212,14 @@ relax_delay_slots (rtx_insn *first) if (invert_jump (jump_insn, label, 1)) { - delete_related_insns (next); + rtx_insn *from = delete_related_insns (next); + + /* We have just removed a BARRIER, which means that the block + number of the next insns has effectively been changed (see + find_basic_block in resource.c), so clear it. */ + if (from) + clear_hashed_info_until_next_barrier (from); + next = jump_insn; } @@ -3484,18 +3492,22 @@ relax_delay_slots (rtx_insn *first) if (invert_jump (delay_jump_insn, label, 1)) { - int i; - /* Must update the INSN_FROM_TARGET_P bits now that the branch is reversed, so that mark_target_live_regs will handle the delay slot insn correctly. */ - for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++) + for (int i = 1; i < XVECLEN (PATTERN (insn), 0); i++) { rtx slot = XVECEXP (PATTERN (insn), 0, i); INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot); } - delete_related_insns (next); + /* We have just removed a BARRIER, which means that the block + number of the next insns has effectively been changed (see + find_basic_block in resource.c), so clear it. */ + rtx_insn *from = delete_related_insns (next); + if (from) + clear_hashed_info_until_next_barrier (from); + next = insn; } |