ra-build.c (copy_insn_p, [...]): Use gcc_assert and gcc_unreachable instead of abort.

	* ra-build.c (copy_insn_p, remember_move, defuse_overlap_p_1,
	live_out_1, prune_hardregs_for_mode, init_one_web_common,
	reinit_one_web, add_subweb, add_subweb_2, init_web_parts,
	record_conflict, compare_and_free_webs, init_webs_defs_uses,
	parts_to_webs_1, parts_to_webs, reset_conflicts,
	check_conflict_numbers, remember_web_was_spilled, handle_asm_insn,
	ra_build_free): Use gcc_assert and gcc_unreachable instead of abort.
	* ra-colorize.c (push_list, put_web, reset_lists, put_web_at_end,
	put_move, remove_move, combine, select_spill, colorize_one_web,
	try_recolor_web, insert_coalesced_conflicts, check_colors,
	break_precolored_alias, restore_conflicts_from_coalesce,
	sort_and_combine_web_pairs, check_uncoalesced_moves): Likewise.
	* ra-rewrite.c (spill_coalescing, slots_overlap_p, emit_loads,
	reloads_to_loads, rewrite_program2, emit_colors): Likewise.
	* ra.c (first_hard_reg, create_insn_info, find_subweb, init_ra,
	check_df): Likewise.
	* real.c (do_add, do_multiply, do_divide, do_compare, do_fix_trunc,
	real_arithmetic, real_compare, real_exponent, real_ldexp,
	real_identical, real_to_integer, real_to_integer2, real_to_decimal,
	real_to_hexadecimal, real_from_integer, ten_to_ptwo, ten_to_mptwo,
	real_digit, real_nan, real_maxval, round_for_format, real_convert,
	real_to_target, real_from_target, real_hash, encode_ieee_single,
	encode_ieee_double, encode_ieee_extended, encode_ieee_quad,
	encode_vax_f, encode_vax_d, encode_vax_g, encode_i370_single,
	encode_i370_double, encode_c4x_single, encode_c4x_extended): Likewise.
	* recog.c (validate_change, validate_replace_rtx_1, asm_operand_ok,
	extract_insn, peep2_next_insn, peep2_reg_dead_p,
	peep2_find_free_register, peephole2_optimize, store_data_bypass_p,
	if_test_bypass_p): Likewise.
	* reg-stack.c (record_label_references, get_asm_operand_n_inputs,
	stack_result, remove_regno_note, get_hard_regnum, emit_pop_insn,
	emit_swap_insn, swap_to_top, move_for_stack_reg,
	subst_stack_regs_pat, subst_asm_stack_regs, change_stack,
	compensate_edge, convert_regs_1): Likewise.
	* regclass.c (init_reg_sets, init_reg_sets_1,
	memory_move_secondary_cost): Likewise.
	* regrename.c (note_sets, clear_dead_regs, scan_rtx_reg, scan_rtx):
	Likewise.
	* reload.c (push_secondary_reload, find_valid_class, push_reload,
	operands_match_p, decompose, immune_p, find_reloads,
	find_reloads_toplev, find_reloads_address_1, subst_reloads,
	copy_replacements, refers_to_regno_for_reload_p,
	reg_overlap_mentioned_for_reload_p): Likewise.
	* reload1.c (compute_use_by_pseudos, replace_pseudos_in, reload,
	count_pseudo, find_reg, eliminate_regs, eliminate_regs_in_insn,
	verify_initial_elim_offsets, finish_spills, clear_reload_reg_in_use,
	reload_reg_free_p, reload_reg_reaches_end_p, reloads_conflict,
	choose_reload_regs, merge_assigned_reloads, emit_input_reload_insns,
	do_output_reload, fixup_abnormal_edges): Likewise.
	* reorg.c (stop_search_p, emit_delay_sequence, get_jump_flags,
	fill_slots_from_thread, relax_delay_slots): Likewise.
	* resource.c (mark_referenced_resources, mark_set_resources):
	Likewise.
	* rtl.c (copy_rtx, rtx_equal_p): Likewise.
	* rtlanal.c (insn_dependent_p, reg_overlap_mentioned_p,
	dead_or_set_p, find_reg_fusage, remove_note, replace_rtx,
	subreg_lsb_1, subreg_regno_offset, subreg_offset_representable_p,
	find_first_parameter_load, can_hoist_insn_p, hoist_update_store,
	hoist_insn_after, hoist_insn_to_edge, nonzero_bits1): Likewise.
	* rtlhooks.c (gen_lowpart_general): Likewise.
	* sbitmap.c (sbitmap_difference): Likewise.
	* sched-deps.c (add_dependence, sched_analyze_1, sched_analyze_2,
	sched_analyze, add_forward_dependence): Likewise.
	* sched-ebb.c (fix_basic_block_boundaries, schedule_ebb): Likewise.
	* sched-rgn.c (debug_regions, compute_trg_info, schedule_region,
	schedule_insns): Likewise.
	* sched-vis.c (print_pattern): Likewise.
	* sdbout.c (sdbout_symbol, sdbout_toplevel_data): Likewise.
	* simplify-rtx.c (simplify_unary_operation, simplify_binary_operation,
	simplify_const_relational_operation, simplify_ternary_operation,
	simplify_immed_subreg, simplify_subreg, simplify_gen_subreg):
	Likewise.
	* sreal.c (copy, sreal_sub, sreal_div): Likewise.
	* stmt.c (force_label_rtx, expand_goto, expand_asm_operands,
	resolve_operand_name_1, expand_return, expand_decl,
	expand_anon_union_decl, emit_case_bit_tests, expand_case): Likewise.
	* stor-layout.c (put_pending_size, smallest_mode_for_size,
	int_mode_for_mode, layout_decl, finish_builtin_struct, layout_type,
	set_sizetype, get_mode_bounds): Likewise.

From-SVN: r87244

1 files changed, 47 insertions, 58 deletions

diff --git a/gcc/reload1.c b/gcc/reload1.c
index 4dd1153..63f829f 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -536,8 +536,7 @@ compute_use_by_pseudos (HARD_REG_SET *to, regset from)
 	      BASIC_BLOCK->global_live_at_start, which might still
 	      contain registers that have not actually been allocated
 	      since they have an equivalence.  */
-	   if (! reload_completed)
-	     abort ();
+	   gcc_assert (reload_completed);
 	 }
        else
 	 {
@@ -584,11 +583,12 @@ replace_pseudos_in (rtx *loc, enum machine_mode mem_mode, rtx usage)
 	*loc = reg_equiv_mem[regno];
       else if (reg_equiv_address[regno])
 	*loc = gen_rtx_MEM (GET_MODE (x), reg_equiv_address[regno]);
-      else if (!REG_P (regno_reg_rtx[regno])
-	       || REGNO (regno_reg_rtx[regno]) != regno)
-	*loc = regno_reg_rtx[regno];
       else
-	abort ();
+	{
+	  gcc_assert (!REG_P (regno_reg_rtx[regno])
+		      || REGNO (regno_reg_rtx[regno]) != regno);
+	  *loc = regno_reg_rtx[regno];
+	}
 
       return;
     }
@@ -1071,8 +1071,7 @@ reload (rtx first, int global)
 
       reload_as_needed (global);
 
-      if (old_frame_size != get_frame_size ())
-	abort ();
+      gcc_assert (old_frame_size == get_frame_size ());
 
       if (num_eliminable)
 	verify_initial_elim_offsets ();
@@ -1576,8 +1575,7 @@ count_pseudo (int reg)
 
   SET_REGNO_REG_SET (&pseudos_counted, reg);
 
-  if (r < 0)
-    abort ();
+  gcc_assert (r >= 0);
 
   spill_add_cost[r] += freq;
 
@@ -1750,9 +1748,8 @@ find_reg (struct insn_chain *chain, int order)
 
   for (i = 0; i < rl->nregs; i++)
     {
-      if (spill_cost[best_reg + i] != 0
-	  || spill_add_cost[best_reg + i] != 0)
-	abort ();
+      gcc_assert (spill_cost[best_reg + i] == 0);
+      gcc_assert (spill_add_cost[best_reg + i] == 0);
       SET_HARD_REG_BIT (used_spill_regs_local, best_reg + i);
     }
   return 1;
@@ -2555,7 +2552,7 @@ eliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn)
     case CLOBBER:
     case ASM_OPERANDS:
     case SET:
-      abort ();
+      gcc_unreachable ();
 
     default:
       break;
@@ -2867,13 +2864,12 @@ eliminate_regs_in_insn (rtx insn, int replace)
 
   if (! insn_is_asm && icode < 0)
     {
-      if (GET_CODE (PATTERN (insn)) == USE
-	  || GET_CODE (PATTERN (insn)) == CLOBBER
-	  || GET_CODE (PATTERN (insn)) == ADDR_VEC
-	  || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
-	  || GET_CODE (PATTERN (insn)) == ASM_INPUT)
-	return 0;
-      abort ();
+      gcc_assert (GET_CODE (PATTERN (insn)) == USE
+		  || GET_CODE (PATTERN (insn)) == CLOBBER
+		  || GET_CODE (PATTERN (insn)) == ADDR_VEC
+		  || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
+		  || GET_CODE (PATTERN (insn)) == ASM_INPUT);
+      return 0;
     }
 
   if (old_set != 0 && REG_P (SET_DEST (old_set))
@@ -3027,8 +3023,7 @@ eliminate_regs_in_insn (rtx insn, int replace)
 		    PATTERN (insn) = gen_rtx_PARALLEL (VOIDmode, vec);
 		    add_clobbers (PATTERN (insn), INSN_CODE (insn));
 		  }
-		if (INSN_CODE (insn) < 0)
-		  abort ();
+		gcc_assert (INSN_CODE (insn) >= 0);
 	      }
 	    /* If we have a nonzero offset, and the source is already
 	       a simple REG, the following transformation would
@@ -3299,13 +3294,11 @@ verify_initial_elim_offsets (void)
   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
     {
       INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, t);
-      if (t != ep->initial_offset)
-	abort ();
+      gcc_assert (t == ep->initial_offset);
     }
 #else
   INITIAL_FRAME_POINTER_OFFSET (t);
-  if (t != reg_eliminate[0].initial_offset)
-    abort ();
+  gcc_assert (t == reg_eliminate[0].initial_offset);
 #endif
 }
 
@@ -3590,8 +3583,7 @@ finish_spills (int global)
        /* Record the current hard register the pseudo is allocated to in
 	  pseudo_previous_regs so we avoid reallocating it to the same
 	  hard reg in a later pass.  */
-       if (reg_renumber[i] < 0)
-	 abort ();
+       gcc_assert (reg_renumber[i] >= 0);
 
        SET_HARD_REG_BIT (pseudo_previous_regs[i], reg_renumber[i]);
        /* Mark it as no longer having a hard register home.  */
@@ -3670,7 +3662,7 @@ finish_spills (int global)
 
 	  /* Make sure we only enlarge the set.  */
 	  GO_IF_HARD_REG_SUBSET (used_by_pseudos2, chain->used_spill_regs, ok);
-	  abort ();
+	  gcc_unreachable ();
 	ok:;
 	}
     }
@@ -4265,7 +4257,7 @@ clear_reload_reg_in_use (unsigned int regno, int opnum,
       used_in_set = &reload_reg_used_in_insn;
       break;
     default:
-      abort ();
+      gcc_unreachable ();
     }
   /* We resolve conflicts with remaining reloads of the same type by
      excluding the intervals of reload registers by them from the
@@ -4461,8 +4453,10 @@ reload_reg_free_p (unsigned int regno, int opnum, enum reload_type type)
 
     case RELOAD_FOR_OTHER_ADDRESS:
       return ! TEST_HARD_REG_BIT (reload_reg_used_in_other_addr, regno);
+
+    default:
+      gcc_unreachable ();
     }
-  abort ();
 }
 
 /* Return 1 if the value in reload reg REGNO, as used by a reload
@@ -4594,9 +4588,10 @@ reload_reg_reaches_end_p (unsigned int regno, int opnum, enum reload_type type)
 	  return 0;
 
       return 1;
-    }
 
-  abort ();
+    default:
+      gcc_unreachable ();
+    }
 }
 
 /* Return 1 if the reloads denoted by R1 and R2 cannot share a register.
@@ -4671,7 +4666,7 @@ reloads_conflict (int r1, int r2)
       return 1;
 
     default:
-      abort ();
+      gcc_unreachable ();
     }
 }
 
@@ -5591,17 +5586,16 @@ choose_reload_regs (struct insn_chain *chain)
 		{
 		  if (REG_P (equiv))
 		    regno = REGNO (equiv);
-		  else if (GET_CODE (equiv) == SUBREG)
+		  else
 		    {
 		      /* This must be a SUBREG of a hard register.
 			 Make a new REG since this might be used in an
 			 address and not all machines support SUBREGs
 			 there.  */
+		      gcc_assert (GET_CODE (equiv) == SUBREG);
 		      regno = subreg_regno (equiv);
 		      equiv = gen_rtx_REG (rld[r].mode, regno);
 		    }
-		  else
-		    abort ();
 		}
 
 	      /* If we found a spill reg, reject it unless it is free
@@ -5805,15 +5799,13 @@ choose_reload_regs (struct insn_chain *chain)
 
       /* Some sanity tests to verify that the reloads found in the first
 	 pass are identical to the ones we have now.  */
-      if (chain->n_reloads != n_reloads)
-	abort ();
+      gcc_assert (chain->n_reloads == n_reloads);
 
       for (i = 0; i < n_reloads; i++)
 	{
 	  if (chain->rld[i].regno < 0 || chain->rld[i].reg_rtx != 0)
 	    continue;
-	  if (chain->rld[i].when_needed != rld[i].when_needed)
-	    abort ();
+	  gcc_assert (chain->rld[i].when_needed == rld[i].when_needed);
 	  for (j = 0; j < n_spills; j++)
 	    if (spill_regs[j] == chain->rld[i].regno)
 	      if (! set_reload_reg (j, i))
@@ -5926,10 +5918,9 @@ choose_reload_regs (struct insn_chain *chain)
 		SET_HARD_REG_BIT (reg_is_output_reload, i + nr);
 	    }
 
-	  if (rld[r].when_needed != RELOAD_OTHER
-	      && rld[r].when_needed != RELOAD_FOR_OUTPUT
-	      && rld[r].when_needed != RELOAD_FOR_INSN)
-	    abort ();
+	  gcc_assert (rld[r].when_needed == RELOAD_OTHER
+		      || rld[r].when_needed == RELOAD_FOR_OUTPUT
+		      || rld[r].when_needed == RELOAD_FOR_INSN);
 	}
     }
 }
@@ -6075,11 +6066,12 @@ merge_assigned_reloads (rtx insn)
 		     so abort.  */
 		  if (rld[j].reg_rtx)
 		    for (k = 0; k < j; k++)
-		      if (rld[k].in != 0 && rld[k].reg_rtx != 0
-			  && rld[k].when_needed == rld[j].when_needed
-			  && rtx_equal_p (rld[k].reg_rtx, rld[j].reg_rtx)
-			  && ! rtx_equal_p (rld[k].in, rld[j].in))
-			abort ();
+		      gcc_assert (rld[k].in == 0 || rld[k].reg_rtx == 0
+				  || rld[k].when_needed != rld[j].when_needed
+				  || !rtx_equal_p (rld[k].reg_rtx,
+						   rld[j].reg_rtx)
+				  || rtx_equal_p (rld[k].in,
+						  rld[j].in));
 		}
 	}
     }
@@ -6293,7 +6285,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl,
       where = &other_input_address_reload_insns;
       break;
     default:
-      abort ();
+      gcc_unreachable ();
     }
 
   push_to_sequence (*where);
@@ -6304,8 +6296,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl,
       /* We are not going to bother supporting the case where a
 	 incremented register can't be copied directly from
 	 OLDEQUIV since this seems highly unlikely.  */
-      if (rl->secondary_in_reload >= 0)
-	abort ();
+      gcc_assert (rl->secondary_in_reload < 0);
 
       if (reload_inherited[j])
 	oldequiv = reloadreg;
@@ -6921,8 +6912,7 @@ do_output_reload (struct insn_chain *chain, struct reload *rl, int j)
     return;
 
   /* If is a JUMP_INSN, we can't support output reloads yet.  */
-  if (JUMP_P (insn))
-    abort ();
+  gcc_assert (!JUMP_P (insn));
 
   emit_output_reload_insns (chain, rld + j, j);
 }
@@ -8066,8 +8056,7 @@ fixup_abnormal_edges (void)
 		 && !can_throw_internal (insn)
 		 && insn != BB_HEAD (bb))
 	    insn = PREV_INSN (insn);
-	  if (!CALL_P (insn) && !can_throw_internal (insn))
-	    abort ();
+	  gcc_assert (CALL_P (insn) || can_throw_internal (insn));
 	  BB_END (bb) = insn;
 	  inserted = true;
 	  insn = NEXT_INSN (insn);