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authorJeff Law <law@redhat.com>2002-06-10 10:32:45 -0600
committerJeff Law <law@gcc.gnu.org>2002-06-10 10:32:45 -0600
commitbf1660a67066f9ad75d368466f5be15cc23a6ca1 (patch)
treeb6731a46c8b99043d03fbda9812dc896be80aba5 /gcc/reload1.c
parent8dc5848454ac4c24ce5a3fead6dd4e4ef4cb3a2f (diff)
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alias.c (static_reg_base_value): New to hold RTL for items allocated once per function for the aliasing code.
* alias.c (static_reg_base_value): New to hold RTL for items allocated once per function for the aliasing code. (init_alias_once_per_function): Initialize static_reg_base_value. (init_alias_analysis): Avoid throw-away allocations of RTL by using pre-computed values in static_reg_base_value. * function.c (prepare_function_start): Call init_alias_once_per_function appropriately. * rtl.h (init_alias_once_per_function): Declare. * caller-save (init_caller_save): Restructure slightly to avoid lots of silly RTL generation. * expr.c (init_expr_once): Likewise. * reload1.c (reload_cse_regs_1): Allocate throw-away register RTL object here. Pass it into children. (reload_cse_simplify_operands): Use passed-in register RTL object. (reload_cse_simplify): Pass through throw-away register RTL object. From-SVN: r54442
Diffstat (limited to 'gcc/reload1.c')
-rw-r--r--gcc/reload1.c26
1 files changed, 14 insertions, 12 deletions
diff --git a/gcc/reload1.c b/gcc/reload1.c
index e5b19e9c..ca25abf 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -443,7 +443,7 @@ static rtx inc_for_reload PARAMS ((rtx, rtx, rtx, int));
static void reload_cse_regs_1 PARAMS ((rtx));
static int reload_cse_noop_set_p PARAMS ((rtx));
static int reload_cse_simplify_set PARAMS ((rtx, rtx));
-static int reload_cse_simplify_operands PARAMS ((rtx));
+static int reload_cse_simplify_operands PARAMS ((rtx, rtx));
static void reload_combine PARAMS ((void));
static void reload_combine_note_use PARAMS ((rtx *, rtx));
static void reload_combine_note_store PARAMS ((rtx, rtx, void *));
@@ -457,7 +457,7 @@ static HOST_WIDE_INT sext_for_mode PARAMS ((enum machine_mode,
HOST_WIDE_INT));
static void failed_reload PARAMS ((rtx, int));
static int set_reload_reg PARAMS ((int, int));
-static void reload_cse_simplify PARAMS ((rtx));
+static void reload_cse_simplify PARAMS ((rtx, rtx));
void fixup_abnormal_edges PARAMS ((void));
extern void dump_needs PARAMS ((struct insn_chain *));
@@ -7992,8 +7992,9 @@ reload_cse_noop_set_p (set)
/* Try to simplify INSN. */
static void
-reload_cse_simplify (insn)
+reload_cse_simplify (insn, testreg)
rtx insn;
+ rtx testreg;
{
rtx body = PATTERN (insn);
@@ -8021,7 +8022,7 @@ reload_cse_simplify (insn)
if (count > 0)
apply_change_group ();
else
- reload_cse_simplify_operands (insn);
+ reload_cse_simplify_operands (insn, testreg);
}
else if (GET_CODE (body) == PARALLEL)
{
@@ -8064,7 +8065,7 @@ reload_cse_simplify (insn)
if (count > 0)
apply_change_group ();
else
- reload_cse_simplify_operands (insn);
+ reload_cse_simplify_operands (insn, testreg);
}
}
@@ -8090,6 +8091,7 @@ reload_cse_regs_1 (first)
rtx first;
{
rtx insn;
+ rtx testreg = gen_rtx_REG (VOIDmode, -1);
cselib_init ();
init_alias_analysis ();
@@ -8097,7 +8099,7 @@ reload_cse_regs_1 (first)
for (insn = first; insn; insn = NEXT_INSN (insn))
{
if (INSN_P (insn))
- reload_cse_simplify (insn);
+ reload_cse_simplify (insn, testreg);
cselib_process_insn (insn);
}
@@ -8268,8 +8270,9 @@ reload_cse_simplify_set (set, insn)
hard registers. */
static int
-reload_cse_simplify_operands (insn)
+reload_cse_simplify_operands (insn, testreg)
rtx insn;
+ rtx testreg;
{
int i, j;
@@ -8289,7 +8292,6 @@ reload_cse_simplify_operands (insn)
int *op_alt_regno[MAX_RECOG_OPERANDS];
/* Array of alternatives, sorted in order of decreasing desirability. */
int *alternative_order;
- rtx reg = gen_rtx_REG (VOIDmode, -1);
extract_insn (insn);
@@ -8373,8 +8375,8 @@ reload_cse_simplify_operands (insn)
if (! TEST_HARD_REG_BIT (equiv_regs[i], regno))
continue;
- REGNO (reg) = regno;
- PUT_MODE (reg, mode);
+ REGNO (testreg) = regno;
+ PUT_MODE (testreg, mode);
/* We found a register equal to this operand. Now look for all
alternatives that can accept this register and have not been
@@ -8416,10 +8418,10 @@ reload_cse_simplify_operands (insn)
alternative yet and the operand being replaced is not
a cheap CONST_INT. */
if (op_alt_regno[i][j] == -1
- && reg_fits_class_p (reg, class, 0, mode)
+ && reg_fits_class_p (testreg, class, 0, mode)
&& (GET_CODE (recog_data.operand[i]) != CONST_INT
|| (rtx_cost (recog_data.operand[i], SET)
- > rtx_cost (reg, SET))))
+ > rtx_cost (testreg, SET))))
{
alternative_nregs[j]++;
op_alt_regno[i][j] = regno;