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author | Kaveh R. Ghazi <ghazi@caip.rutgers.edu> | 2003-01-16 15:13:33 +0000 |
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committer | Kaveh Ghazi <ghazi@gcc.gnu.org> | 2003-01-16 15:13:33 +0000 |
commit | fc5553705286d244d9cb6b6447ddb93d0ed6e5fa (patch) | |
tree | b6bfa10c09235d9c777bc65f4eb59e74ae0e4eec /gcc/reload1.c | |
parent | faca036b47943d855a9cba0a319680fcbcbf4988 (diff) | |
download | gcc-fc5553705286d244d9cb6b6447ddb93d0ed6e5fa.zip gcc-fc5553705286d244d9cb6b6447ddb93d0ed6e5fa.tar.gz gcc-fc5553705286d244d9cb6b6447ddb93d0ed6e5fa.tar.bz2 |
arm.h (CONDITIONAL_REGISTER_USAGE): Avoid signed/unsigned warning.
* arm.h (CONDITIONAL_REGISTER_USAGE): Avoid signed/unsigned
warning.
* emit-rtl.c (gen_rtx_REG, set_mem_attributes_minus_bitpos,
init_emit_once): Likewise.
* flow.c (mark_regs_live_at_end, calculate_global_regs_live):
Likewise.
* function.c (assign_stack_temp_for_type): Likewise.
* loop.c (loop_invariant_p): Likewise.
* recog.c (push_operand): Likewise.
* regclass.c (init_reg_sets_1): Likewise.
* reload.c (update_auto_inc_notes): Likewise.
* reload1.c (reload_as_needed, emit_input_reload_insns): Likewise.
* stmt.c (expand_asm_operands): Likewise.
* stor-layout.c (start_record_layout): Likewise.
cp:
* class.c (layout_virtual_bases): Avoid signed/unsigned warning.
java:
* jcf-write.c (generate_bytecode_insns): Avoid signed/unsigned
warning.
From-SVN: r61389
Diffstat (limited to 'gcc/reload1.c')
-rw-r--r-- | gcc/reload1.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/reload1.c b/gcc/reload1.c index 979847d..d4d13aa 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -3984,7 +3984,7 @@ reload_as_needed (live_known) REGNO (rld[i].reg_rtx)) /* Make sure it is the inc/dec pseudo, and not some other (e.g. output operand) pseudo. */ - && (reg_reloaded_contents[REGNO (rld[i].reg_rtx)] + && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)] == REGNO (XEXP (in_reg, 0)))) { @@ -4051,7 +4051,7 @@ reload_as_needed (live_known) REGNO (rld[i].reg_rtx)) /* Make sure it is the inc/dec pseudo, and not some other (e.g. output operand) pseudo. */ - && (reg_reloaded_contents[REGNO (rld[i].reg_rtx)] + && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)] == REGNO (XEXP (in_reg, 0)))) { SET_HARD_REG_BIT (reg_is_output_reload, @@ -6260,7 +6260,7 @@ emit_input_reload_insns (chain, rl, old, j) or memory. */ if (oldequiv != 0 - && ((REGNO_REG_CLASS (regno) != rl->class + && (((enum reg_class) REGNO_REG_CLASS (regno) != rl->class && (REGISTER_MOVE_COST (mode, REGNO_REG_CLASS (regno), rl->class) >= MEMORY_MOVE_COST (mode, rl->class, 1))) |