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author | Eric Botcazou <ebotcazou@libertysurf.fr> | 2005-02-01 08:22:19 +0100 |
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committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2005-02-01 07:22:19 +0000 |
commit | 9c0a30c366cd160bc8bd3589468dae18bd1b30ec (patch) | |
tree | a6a1a13b3bbed54f050188c868e50dbe5ca6fb56 /gcc/reload1.c | |
parent | 8c94c75ae756f2f79911197da886e0b247f5fa05 (diff) | |
download | gcc-9c0a30c366cd160bc8bd3589468dae18bd1b30ec.zip gcc-9c0a30c366cd160bc8bd3589468dae18bd1b30ec.tar.gz gcc-9c0a30c366cd160bc8bd3589468dae18bd1b30ec.tar.bz2 |
Patch from Richard Sandiford <rsandifo@redhat.com>
* reload1.c (choose_reload_regs): Prevent the find_equiv_reg() code
from inheriting a subreg equivalence with a non-spill register.
* tree.h (DECL_FUNCTION_CODE): Document that it is overloaded.
From-SVN: r94529
Diffstat (limited to 'gcc/reload1.c')
-rw-r--r-- | gcc/reload1.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/gcc/reload1.c b/gcc/reload1.c index 7961c99..d4141be 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -5589,6 +5589,15 @@ choose_reload_regs (struct insn_chain *chain) gcc_assert (GET_CODE (equiv) == SUBREG); regno = subreg_regno (equiv); equiv = gen_rtx_REG (rld[r].mode, regno); + /* If we choose EQUIV as the reload register, but the + loop below decides to cancel the inheritance, we'll + end up reloading EQUIV in rld[r].mode, not the mode + it had originally. That isn't safe when EQUIV isn't + available as a spill register since its value might + still be live at this point. */ + for (i = regno; i < regno + (int) rld[r].nregs; i++) + if (TEST_HARD_REG_BIT (reload_reg_unavailable, i)) + equiv = 0; } } |