aboutsummaryrefslogtreecommitdiff
path: root/gcc/regclass.c
diff options
context:
space:
mode:
authorDavid Edelsohn <edelsohn@mhpcc.edu>1998-10-23 20:51:02 +0000
committerDavid Edelsohn <dje@gcc.gnu.org>1998-10-23 16:51:02 -0400
commit8c368ee2188b8630efeab672d3bb9f2bfc61e922 (patch)
tree836799cb66662b6b74c81c8f75e3d8c1b3e41ce2 /gcc/regclass.c
parentb590bbfd110bc151f231c3a1ea80200f2b0bb60b (diff)
downloadgcc-8c368ee2188b8630efeab672d3bb9f2bfc61e922.zip
gcc-8c368ee2188b8630efeab672d3bb9f2bfc61e922.tar.gz
gcc-8c368ee2188b8630efeab672d3bb9f2bfc61e922.tar.bz2
loop.c (loop_has_tablejump): New variable.
* loop.c (loop_has_tablejump): New variable. (prescan_loop): Scan for it. (insert_bct): Replace explicit scan with use of it. * regclass.c (regclass): Restore loop variable j. (record_reg_classes): Deterine op_types modifiers and initialize classes[i] before matching constraints. Handle matching constraints 5-9. From-SVN: r23263
Diffstat (limited to 'gcc/regclass.c')
-rw-r--r--gcc/regclass.c30
1 files changed, 16 insertions, 14 deletions
diff --git a/gcc/regclass.c b/gcc/regclass.c
index 75d7302..8d873f9 100644
--- a/gcc/regclass.c
+++ b/gcc/regclass.c
@@ -998,6 +998,7 @@ regclass (f, nregs)
{
rtx r = gen_rtx_REG (VOIDmode, 0);
enum machine_mode m;
+ register int j;
for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
@@ -1210,8 +1211,19 @@ record_reg_classes (n_alts, n_ops, ops, modes, constraints, insn)
continue;
}
- if (*p == '%')
- p++;
+ /* Ascertain modifiers for line and skip any modifiers that might
+ occur before first constraint. */
+ while (*p == '%' || *p == '=' || *p == '+' || *p == '&')
+ {
+ if (*p == '=')
+ op_types[i] = OP_WRITE;
+ else if (*p == '+')
+ op_types[i] = OP_READ_WRITE;
+
+ p++;
+ }
+
+ classes[i] = NO_REGS;
/* If this alternative is only relevant when this operand
matches a previous operand, we do different things depending
@@ -1281,18 +1293,9 @@ record_reg_classes (n_alts, n_ops, ops, modes, constraints, insn)
any of the constraints. Collect the valid register classes
and see if this operand accepts memory. */
- classes[i] = NO_REGS;
while (*p && (c = *p++) != ',')
switch (c)
{
- case '=':
- op_types[i] = OP_WRITE;
- break;
-
- case '+':
- op_types[i] = OP_READ_WRITE;
- break;
-
case '*':
/* Ignore the next letter for this pass. */
p++;
@@ -1300,10 +1303,9 @@ record_reg_classes (n_alts, n_ops, ops, modes, constraints, insn)
case '?':
alt_cost += 2;
- case '%':
- case '!': case '#':
- case '&':
+ case '!': case '#': case '&':
case '0': case '1': case '2': case '3': case '4':
+ case '5': case '6': case '7': case '8': case '9':
case 'p':
break;