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authorUlrich Weigand <uweigand@de.ibm.com>2002-08-14 10:04:51 +0000
committerUlrich Weigand <uweigand@gcc.gnu.org>2002-08-14 10:04:51 +0000
commitccfc6cc8fa5ab66c0e2dede177aa5b1010523ffc (patch)
treef8955f2da7788407bd35a092c0a414ccd029de11 /gcc/regclass.c
parent72c41e5adc70750cee23e185d6cbadb3950a5b2d (diff)
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reload.c (find_reloads): Handle constraint letters marked by EXTRA_ADDRESS_CONSTRAINT and...
* reload.c (find_reloads): Handle constraint letters marked by EXTRA_ADDRESS_CONSTRAINT and EXTRA_MEMORY_CONSTRAINT. (alternative_allows_memconst): Likewise. * reload1.c (maybe_fix_stack_asms): Likewise. * recog.c (asm_operand_ok, preprocess_constraints, constrain_operands): Likewise. * regclass.c (record_operand_costs, record_reg_classes): Likewise. * local-alloc.c (block_alloc, requires_inout): Likewise. * stmt.c (parse_output_constraint, parse_input_constraint): Likewise. * defaults.h (EXTRA_MEMORY_CONSTRAINT): Provide a default. (EXTRA_ADDRESS_CONSTRAINT): Likewise. * doc/tm.texi: Document these two new target macros. * config/s390/s390.c (s390_expand_plus_operand): Accept already valid operands. (q_constraint): New function. config/s390/s390-protos.h (q_constraint): Declare it. config/s390/s390.h (EXTRA_CONSTRAINT): Use it. (EXTRA_MEMORY_CONSTRAINT): New macro. * config/s390/s390.md: Throughout the machine description, replace all instances of the constraint combinations 'Qo' or 'oQ' with simply 'Q'. From-SVN: r56291
Diffstat (limited to 'gcc/regclass.c')
-rw-r--r--gcc/regclass.c24
1 files changed, 23 insertions, 1 deletions
diff --git a/gcc/regclass.c b/gcc/regclass.c
index 1451f8a..75335b1 100644
--- a/gcc/regclass.c
+++ b/gcc/regclass.c
@@ -1007,7 +1007,8 @@ record_operand_costs (insn, op_costs, reg_pref)
if (GET_CODE (recog_data.operand[i]) == MEM)
record_address_regs (XEXP (recog_data.operand[i], 0),
MODE_BASE_REG_CLASS (modes[i]), frequency * 2);
- else if (constraints[i][0] == 'p')
+ else if (constraints[i][0] == 'p'
+ || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0]))
record_address_regs (recog_data.operand[i],
MODE_BASE_REG_CLASS (modes[i]), frequency * 2);
}
@@ -1709,6 +1710,27 @@ record_reg_classes (n_alts, n_ops, ops, modes,
#ifdef EXTRA_CONSTRAINT
else if (EXTRA_CONSTRAINT (op, c))
win = 1;
+
+ if (EXTRA_MEMORY_CONSTRAINT (c))
+ {
+ /* Every MEM can be reloaded to fit. */
+ allows_mem[i] = 1;
+ if (GET_CODE (op) == MEM)
+ win = 1;
+ }
+ if (EXTRA_ADDRESS_CONSTRAINT (op))
+ {
+ /* Every address can be reloaded to fit. */
+ allows_addr = 1;
+ if (address_operand (op, GET_MODE (op)))
+ win = 1;
+ /* We know this operand is an address, so we want it to be
+ allocated to a register that can be the base of an
+ address, ie BASE_REG_CLASS. */
+ classes[i]
+ = reg_class_subunion[(int) classes[i]]
+ [(int) MODE_BASE_REG_CLASS (VOIDmode)];
+ }
#endif
break;
}