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authorRichard Sandiford <rdsandiford@googlemail.com>2011-11-27 10:09:15 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2011-11-27 10:09:15 +0000
commit006b72bffc64518d4e486982c548ec831dae2392 (patch)
tree550c92021f891ad0b45cc382f700d0d14027acd1 /gcc/recog.c
parenta58371f313034981ebdcdbd6e7604a41df281a00 (diff)
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hard-reg-set.h (target_hard_regs): Add x_accessible_reg_set and x_operand_reg_set.
gcc/ * hard-reg-set.h (target_hard_regs): Add x_accessible_reg_set and x_operand_reg_set. (accessible_reg_set, operand_reg_set): New macros. * reginfo.c (init_reg_sets): Initialize accessible_reg_set and operand_reg_set. (saved_accessible_reg_set, saved_operand_reg_set): New variables. (save_register_info): Save them. (restore_register_info): Restore them. (init_reg_sets_1): Limit operand_reg_set to accessible_reg_set. Remove NO_REGS registers from operand_reg_set. Treat members of operand_reg_set as fixed. * recog.c (general_operand): Check operand_reg_set rather than NO_REGS. (register_operand, nonmemory_operand): Likewise. * varasm.c (make_decl_rtl): Always use DECL_MODE as the mode of register variables. Check accessible_reg_set and operand_reg_set. * config/mips/mips.c (mips_conditional_register_usage): Remove inaccessible register from accessible_reg_set, rather than just making them fixed. gcc/testsuite/ * gcc.target/mips/mips.exp (mips-dg-options): Make -mno-dsp imply -mno-dspr2. * gcc.target/mips/no-dsp-1.c: New test. * gcc.target/mips/soft-float-1.c: Likewise. From-SVN: r181760
Diffstat (limited to 'gcc/recog.c')
-rw-r--r--gcc/recog.c28
1 files changed, 7 insertions, 21 deletions
diff --git a/gcc/recog.c b/gcc/recog.c
index 17cec75..19f00b1 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -925,10 +925,7 @@ next_insn_tests_no_inequality (rtx insn)
it has.
The main use of this function is as a predicate in match_operand
- expressions in the machine description.
-
- For an explanation of this function's behavior for registers of
- class NO_REGS, see the comment for `register_operand'. */
+ expressions in the machine description. */
int
general_operand (rtx op, enum machine_mode mode)
@@ -998,9 +995,8 @@ general_operand (rtx op, enum machine_mode mode)
}
if (code == REG)
- /* A register whose class is NO_REGS is not a general operand. */
return (REGNO (op) >= FIRST_PSEUDO_REGISTER
- || REGNO_REG_CLASS (REGNO (op)) != NO_REGS);
+ || in_hard_reg_set_p (operand_reg_set, GET_MODE (op), REGNO (op)));
if (code == MEM)
{
@@ -1033,15 +1029,7 @@ address_operand (rtx op, enum machine_mode mode)
If MODE is VOIDmode, accept a register in any mode.
The main use of this function is as a predicate in match_operand
- expressions in the machine description.
-
- As a special exception, registers whose class is NO_REGS are
- not accepted by `register_operand'. The reason for this change
- is to allow the representation of special architecture artifacts
- (such as a condition code register) without extending the rtl
- definitions. Since registers of class NO_REGS cannot be used
- as registers in any case where register classes are examined,
- it is most consistent to keep this function from accepting them. */
+ expressions in the machine description. */
int
register_operand (rtx op, enum machine_mode mode)
@@ -1080,11 +1068,10 @@ register_operand (rtx op, enum machine_mode mode)
op = sub;
}
- /* We don't consider registers whose class is NO_REGS
- to be a register operand. */
return (REG_P (op)
&& (REGNO (op) >= FIRST_PSEUDO_REGISTER
- || REGNO_REG_CLASS (REGNO (op)) != NO_REGS));
+ || in_hard_reg_set_p (operand_reg_set,
+ GET_MODE (op), REGNO (op))));
}
/* Return 1 for a register in Pmode; ignore the tested mode. */
@@ -1203,11 +1190,10 @@ nonmemory_operand (rtx op, enum machine_mode mode)
op = SUBREG_REG (op);
}
- /* We don't consider registers whose class is NO_REGS
- to be a register operand. */
return (REG_P (op)
&& (REGNO (op) >= FIRST_PSEUDO_REGISTER
- || REGNO_REG_CLASS (REGNO (op)) != NO_REGS));
+ || in_hard_reg_set_p (operand_reg_set,
+ GET_MODE (op), REGNO (op))));
}
/* Return 1 if OP is a valid operand that stands for pushing a