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authorJim Wilson <jimw@sifive.com>2020-02-08 13:57:36 -0800
committerJim Wilson <jimw@sifive.com>2020-02-08 13:57:36 -0800
commitb780f68e025b2cf5631183e199ebf672ea463af6 (patch)
treeb9ec58ed666f0e5c8b6f3684cedb66b57a108aa6 /gcc/recog.c
parentaaa26bf496a646778ac861aed124d960b5bf549f (diff)
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RISC-V: Improve caller-save code generation.
Avoid paradoxical subregs when caller save. This reduces stack frame size due to smaller loads and stores, and more frequent rematerialization. PR target/93532 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
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