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author | Alexandre Oliva <aoliva@redhat.com> | 2018-03-09 18:50:56 +0000 |
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committer | Jeff Law <law@gcc.gnu.org> | 2018-03-09 11:50:56 -0700 |
commit | 998fd1413977a70cfeb7bf9180f3b462a7731237 (patch) | |
tree | 12fc5f25e3d71e6b873da993f69004f09ea99260 /gcc/recog.c | |
parent | 300e61fa150ce9fa7bc86784aaa6baeffd174c2f (diff) | |
download | gcc-998fd1413977a70cfeb7bf9180f3b462a7731237.zip gcc-998fd1413977a70cfeb7bf9180f3b462a7731237.tar.gz gcc-998fd1413977a70cfeb7bf9180f3b462a7731237.tar.bz2 |
re PR rtl-optimization/84682 (internal compiler error: Segmentation fault (process_address_1))
PR rtl-optimization/84682
* lra-constraints.c (process_address_1): Check is_address flag
for address constraints.
(process_alt_operands): Likewise.
* lra.c (lra_set_insn_recog_data): Pass asm operand locs to
preprocess_constraints.
* recog.h (preprocess_constraints): Add oploc parameter.
Adjust callers.
PR rtl-optimization/84682
* gcc.dg/torture/pr84682-1.c: New.
* gcc.dg/torture/pr84682-2.c: New.
* gcc.dg/torture/pr84682-3.c: New.
From-SVN: r258393
Diffstat (limited to 'gcc/recog.c')
-rw-r--r-- | gcc/recog.c | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/gcc/recog.c b/gcc/recog.c index 0e26c93..0a8fa2c 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -2331,15 +2331,20 @@ extract_insn (rtx_insn *insn) which_alternative = -1; } -/* Fill in OP_ALT_BASE for an instruction that has N_OPERANDS operands, - N_ALTERNATIVES alternatives and constraint strings CONSTRAINTS. - OP_ALT_BASE has N_ALTERNATIVES * N_OPERANDS entries and CONSTRAINTS - has N_OPERANDS entries. */ +/* Fill in OP_ALT_BASE for an instruction that has N_OPERANDS + operands, N_ALTERNATIVES alternatives and constraint strings + CONSTRAINTS. OP_ALT_BASE has N_ALTERNATIVES * N_OPERANDS entries + and CONSTRAINTS has N_OPERANDS entries. OPLOC should be passed in + if the insn is an asm statement and preprocessing should take the + asm operands into account, e.g. to determine whether they could be + addresses in constraints that require addresses; it should then + point to an array of pointers to each operand. */ void preprocess_constraints (int n_operands, int n_alternatives, const char **constraints, - operand_alternative *op_alt_base) + operand_alternative *op_alt_base, + rtx **oploc) { for (int i = 0; i < n_operands; i++) { @@ -2426,6 +2431,9 @@ preprocess_constraints (int n_operands, int n_alternatives, break; case CT_ADDRESS: + if (oploc && !address_operand (*oploc[i], VOIDmode)) + break; + op_alt[i].is_address = 1; op_alt[i].cl = (reg_class_subunion @@ -2470,7 +2478,8 @@ preprocess_insn_constraints (unsigned int icode) for (int i = 0; i < n_operands; ++i) constraints[i] = insn_data[icode].operand[i].constraint; - preprocess_constraints (n_operands, n_alternatives, constraints, op_alt); + preprocess_constraints (n_operands, n_alternatives, constraints, op_alt, + NULL); this_target_recog->x_op_alt[icode] = op_alt; return op_alt; @@ -2493,7 +2502,8 @@ preprocess_constraints (rtx_insn *insn) int n_entries = n_operands * n_alternatives; memset (asm_op_alt, 0, n_entries * sizeof (operand_alternative)); preprocess_constraints (n_operands, n_alternatives, - recog_data.constraints, asm_op_alt); + recog_data.constraints, asm_op_alt, + NULL); recog_op_alt = asm_op_alt; } } |