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authorJeff Law <jlaw@ventanamicro.com>2024-05-08 13:44:00 -0600
committerJeff Law <jlaw@ventanamicro.com>2024-05-08 13:44:00 -0600
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[RISC-V][V2] Fix incorrect if-then-else nesting of Zbs usage in constant synthesis
Reposting without the patch that ignores whitespace. The CI system doesn't like including both patches, that'll generate a failure to apply and none of the tests actually get run. So I managed to goof the if-then-else level of the bseti bits last week. They were supposed to be a last ditch effort to improve the result, but ended up inside a conditional where they don't really belong. I almost always use Zba, Zbb and Zbs together, so it slipped by. So it's NFC if you always test with Zbb and Zbs enabled together. But if you enabled Zbs without Zbb you'd see a failure to use bseti. gcc/ * config/riscv/riscv.cc (riscv_build_integer_1): Fix incorrect if-then-else nesting of Zbs code.
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