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| author | Eric Botcazou <ebotcazou@adacore.com> | 2023-03-28 10:13:24 +0200 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@adacore.com> | 2023-03-28 10:41:33 +0200 |
| commit | a21bd7faba67997a6da457dbda16f15bca1a9156 (patch) | |
| tree | 9ac8b825fe424984218248aad8fabf7372d36535 /gcc/range-op-float.cc | |
| parent | 5cea00da1d3c5b37c77230ff863d7c1916a512f2 (diff) | |
| download | gcc-a21bd7faba67997a6da457dbda16f15bca1a9156.zip gcc-a21bd7faba67997a6da457dbda16f15bca1a9156.tar.gz gcc-a21bd7faba67997a6da457dbda16f15bca1a9156.tar.bz2 | |
Fix PR target/109140
This is a regression present on the mainline and 12 branch at -O2, but the
issue is related to vectorization so was present at -O3 in earlier versions.
The vcondu expander that was added for VIS 3 more than a decade ago does not
fully work, because it does not filter out the unsigned condition codes (the
instruction is an UNSPEC that accepts only signed condition codes).
While I was at it, I also added the missing vcond and vcondu expanders for
the new comparison instructions that were added in VIS 4.
gcc/
PR target/109140
* config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
on operand #3 to get the final condition code. Use std::swap.
* config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
(fucmp<gcond:code>8<P:mode>_vis): Move around.
(fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
(vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
gcc/testsuite/
* gcc.target/sparc/20230328-1.c: New test.
* gcc.target/sparc/20230328-2.c: Likewise.
* gcc.target/sparc/20230328-3.c: Likewise.
* gcc.target/sparc/20230328-4.c: Likewise.
Diffstat (limited to 'gcc/range-op-float.cc')
0 files changed, 0 insertions, 0 deletions