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authorPan Li <pan2.li@intel.com>2023-06-07 11:41:01 +0800
committerPan Li <pan2.li@intel.com>2023-06-08 23:05:57 +0800
commit1379ae33e05c28d705f3c69a3f6c774bf6e83136 (patch)
tree4ba89c705576f566b65b6242696db125f97bffad /gcc/range-op-float.cc
parent9589a46ddadc8b93c224c3f84fa94746c04596bf (diff)
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RISC-V: Add more test cases for RVV FP16
This patch would like to add new test cases to make sure the RVV FP16 works well as expected. Signed-off-by: Pan Li <pan2.li@intel.com> gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/zvfh-intrinsic.c: Add new cases. * gcc.target/riscv/rvv/base/zvfh-over-zvfhmin.c: New test.
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