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author | Andrew Pinski <apinski@marvell.com> | 2020-01-10 23:00:39 +0000 |
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committer | Andrew Pinski <apinski@marvell.com> | 2020-01-13 22:13:59 +0000 |
commit | 38c69700bb2ae7dbf1dc938fb8dba04a17bd891c (patch) | |
tree | db70eb9f72a36b42ee609c504ff41934166758a8 /gcc/predict.c | |
parent | 97e2f333087d180a78d92c99b038f0888ac63c02 (diff) | |
download | gcc-38c69700bb2ae7dbf1dc938fb8dba04a17bd891c.zip gcc-38c69700bb2ae7dbf1dc938fb8dba04a17bd891c.tar.gz gcc-38c69700bb2ae7dbf1dc938fb8dba04a17bd891c.tar.bz2 |
Add initial octeontx2 support.
This adds octeontx2 naming. It currently uses the cortexa57
cost model and schedule model until I submit this. This is
more a place holder to get the naming of the cores in GCC 10.
I will submit the cost model in the next couple of days.
ChangeLog:
* config/aarch64/aarch64-cores.def (octeontx2): New define.
(octeontx2t98): New define.
(octeontx2t96): New define.
(octeontx2t93): New define.
(octeontx2f95): New define.
(octeontx2f95n): New define.
(octeontx2f95mm): New define.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (-mcpu=): Document the new cpu types.
Diffstat (limited to 'gcc/predict.c')
0 files changed, 0 insertions, 0 deletions