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| author | Jakub Jelinek <jakub@redhat.com> | 2013-12-19 22:27:51 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2013-12-19 22:27:51 +0100 |
| commit | e15eb172b0dd7451f121c908a97ab86a45759993 (patch) | |
| tree | 0dd1c959d5fa1a9b4256002c3671f2654e454c31 /gcc/postreload.c | |
| parent | d8d79c1df220d94f4c285e0a6e1e750bfb488d78 (diff) | |
| download | gcc-e15eb172b0dd7451f121c908a97ab86a45759993.zip gcc-e15eb172b0dd7451f121c908a97ab86a45759993.tar.gz gcc-e15eb172b0dd7451f121c908a97ab86a45759993.tar.bz2 | |
re PR other/59545 (Signed integer overflow issues)
PR other/59545
* genattrtab.c (struct attr_hash): Change hashcode type to unsigned.
(attr_hash_add_rtx, attr_hash_add_string): Change hashcode parameter
to unsigned.
(attr_rtx_1): Change hashcode variable to unsigned.
(attr_string): Likewise. Perform first multiplication in unsigned
type.
* ifcvt.c (noce_try_store_flag_constants): Avoid signed integer
overflows.
* double-int.c (neg_double): Likewise.
* stor-layout.c (set_min_and_max_values_for_integral_type): Likewise.
* combine.c (force_to_mode): Likewise.
* postreload.c (move2add_use_add2_insn, move2add_use_add3_insn,
reload_cse_move2add, move2add_note_store): Likewise.
* simplify-rtx.c (simplify_const_unary_operation,
simplify_const_binary_operation): Likewise.
* ipa-split.c (find_split_points): Initialize first.can_split
and first.non_ssa_vars.
* gengtype-state.c (read_state_files_list): Fix up check.
* genautomata.c (reserv_sets_hash_value): Use portable rotation
idiom.
java/
* class.c (hashUtf8String): Compute hash in unsigned type.
* javaop.h (WORD_TO_INT): Avoid signed integer overflow.
From-SVN: r206134
Diffstat (limited to 'gcc/postreload.c')
| -rw-r--r-- | gcc/postreload.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/postreload.c b/gcc/postreload.c index 37bd9ff..478a552 100644 --- a/gcc/postreload.c +++ b/gcc/postreload.c @@ -1766,7 +1766,7 @@ move2add_use_add2_insn (rtx reg, rtx sym, rtx off, rtx insn) rtx pat = PATTERN (insn); rtx src = SET_SRC (pat); int regno = REGNO (reg); - rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[regno], + rtx new_src = gen_int_mode (UINTVAL (off) - reg_offset[regno], GET_MODE (reg)); bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)); bool changed = false; @@ -1866,7 +1866,7 @@ move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx insn) && reg_symbol_ref[i] != NULL_RTX && rtx_equal_p (sym, reg_symbol_ref[i])) { - rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[i], + rtx new_src = gen_int_mode (UINTVAL (off) - reg_offset[i], GET_MODE (reg)); /* (set (reg) (plus (reg) (const_int 0))) is not canonical; use (set (reg) (reg)) instead. @@ -1901,7 +1901,7 @@ move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx insn) tem = gen_rtx_REG (GET_MODE (reg), min_regno); if (i != min_regno) { - rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[min_regno], + rtx new_src = gen_int_mode (UINTVAL (off) - reg_offset[min_regno], GET_MODE (reg)); tem = gen_rtx_PLUS (GET_MODE (reg), tem, new_src); } @@ -2010,7 +2010,7 @@ reload_cse_move2add (rtx first) && CONST_INT_P (XEXP (SET_SRC (set), 1))) { rtx src3 = XEXP (SET_SRC (set), 1); - HOST_WIDE_INT added_offset = INTVAL (src3); + unsigned HOST_WIDE_INT added_offset = UINTVAL (src3); HOST_WIDE_INT base_offset = reg_offset[REGNO (src)]; HOST_WIDE_INT regno_offset = reg_offset[regno]; rtx new_src = @@ -2224,7 +2224,7 @@ move2add_note_store (rtx dst, const_rtx set, void *data) { rtx src = SET_SRC (set); rtx base_reg; - HOST_WIDE_INT offset; + unsigned HOST_WIDE_INT offset; int base_regno; switch (GET_CODE (src)) @@ -2235,7 +2235,7 @@ move2add_note_store (rtx dst, const_rtx set, void *data) base_reg = XEXP (src, 0); if (CONST_INT_P (XEXP (src, 1))) - offset = INTVAL (XEXP (src, 1)); + offset = UINTVAL (XEXP (src, 1)); else if (REG_P (XEXP (src, 1)) && move2add_valid_value_p (REGNO (XEXP (src, 1)), mode)) { |