diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2016-11-15 18:13:56 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2016-11-15 18:13:56 +0000 |
| commit | 3712c7a30197c43bc98d46e344391287da16d7e1 (patch) | |
| tree | 63471b5de9227424f4f00e145e723c459b6e6b3d /gcc/postreload.c | |
| parent | ba3c3dc0702eca06bde4841e3bbdf0d428b71968 (diff) | |
| download | gcc-3712c7a30197c43bc98d46e344391287da16d7e1.zip gcc-3712c7a30197c43bc98d46e344391287da16d7e1.tar.gz gcc-3712c7a30197c43bc98d46e344391287da16d7e1.tar.bz2 | |
Add a load_extend_op wrapper
LOAD_EXTEND_OP only applies to scalar integer modes that are narrower
than a word. However, callers weren't consistent about which of these
checks they made beforehand, and also weren't consistent about whether
"smaller" was based on (bit)size or precision (IMO it's the latter).
This patch adds a wrapper to try to make the macro easier to use.
LOAD_EXTEND_OP is often used to disable transformations that aren't
beneficial when extends from memory are free, so being stricter about
the check accidentally exposed more optimisation opportunities.
"SUBREG_BYTE (...) == 0" and subreg_lowpart_p are implied by
paradoxical_subreg_p, so the patch also removes some redundant tests.
The patch doesn't change reload, since different checks could have
unforeseen consequences.
gcc/
2016-11-15 Richard Sandiford <richard.sandiford@arm.com>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
* rtl.h (load_extend_op): Declare.
* rtlanal.c (load_extend_op): New function.
(nonzero_bits1): Use it.
(num_sign_bit_copies1): Likewise.
* cse.c (cse_insn): Likewise.
* fold-const.c (fold_single_bit_test): Likewise.
(fold_unary_loc): Likewise.
* fwprop.c (free_load_extend): Likewise.
* postreload.c (reload_cse_simplify_set): Likewise.
(reload_cse_simplify_operands): Likewise.
* combine.c (try_combine): Likewise.
(simplify_set): Likewise. Remove redundant SUBREG_BYTE and
subreg_lowpart_p checks.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r242444
Diffstat (limited to 'gcc/postreload.c')
| -rw-r--r-- | gcc/postreload.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/gcc/postreload.c b/gcc/postreload.c index 8a44562..a11d270 100644 --- a/gcc/postreload.c +++ b/gcc/postreload.c @@ -256,8 +256,7 @@ reload_cse_simplify_set (rtx set, rtx_insn *insn) generating an extend instruction instead of a reg->reg copy. Thus the destination must be a register that we can widen. */ if (MEM_P (src) - && GET_MODE_BITSIZE (GET_MODE (src)) < BITS_PER_WORD - && (extend_op = LOAD_EXTEND_OP (GET_MODE (src))) != UNKNOWN + && (extend_op = load_extend_op (GET_MODE (src))) != UNKNOWN && !REG_P (SET_DEST (set))) return 0; @@ -330,8 +329,7 @@ reload_cse_simplify_set (rtx set, rtx_insn *insn) && REG_P (this_rtx) && !REG_P (SET_SRC (set)))) { - if (GET_MODE_BITSIZE (GET_MODE (SET_DEST (set))) < BITS_PER_WORD - && extend_op != UNKNOWN + if (extend_op != UNKNOWN #ifdef CANNOT_CHANGE_MODE_CLASS && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SET_DEST (set)), word_mode, @@ -414,9 +412,7 @@ reload_cse_simplify_operands (rtx_insn *insn, rtx testreg) continue; op = recog_data.operand[i]; - if (MEM_P (op) - && GET_MODE_BITSIZE (GET_MODE (op)) < BITS_PER_WORD - && LOAD_EXTEND_OP (GET_MODE (op)) != UNKNOWN) + if (MEM_P (op) && load_extend_op (GET_MODE (op)) != UNKNOWN) { rtx set = single_set (insn); @@ -449,7 +445,7 @@ reload_cse_simplify_operands (rtx_insn *insn, rtx testreg) && SET_DEST (set) == recog_data.operand[1-i]) { validate_change (insn, recog_data.operand_loc[i], - gen_rtx_fmt_e (LOAD_EXTEND_OP (GET_MODE (op)), + gen_rtx_fmt_e (load_extend_op (GET_MODE (op)), word_mode, op), 1); validate_change (insn, recog_data.operand_loc[1-i], |