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| author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-08-30 11:11:42 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-08-30 11:11:42 +0000 |
| commit | 6b9c3decc38f6f852adf16951b9b1b043112cd1c (patch) | |
| tree | e5f94df609e868850d97acfc272b72bc5ed4ed4b /gcc/postreload.c | |
| parent | 7c61657f68cc45bdbbfcfd762dbfd7021f3acb3f (diff) | |
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[26/77] Use is_a <scalar_int_mode> in subreg/extract simplifications
This patch adds is_a <scalar_int_mode> checks to various places that
were optimising subregs or extractions in ways that only made sense
for scalar integers. Often the subreg transformations were looking
for extends, truncates or shifts and trying to remove the subreg, which
wouldn't be correct if the SUBREG_REG was a vector rather than a scalar.
The simplify_binary_operation_1 part also removes a redundant:
GET_MODE (opleft) == GET_MODE (XEXP (opright, 0))
since this must be true for:
(ior A (lshifrt B ...)) A == opleft, B == XEXP (opright, 0)
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* combine.c (find_split_point): Add is_a <scalar_int_mode> checks.
(make_compound_operation_int): Likewise.
(change_zero_ext): Likewise.
* expr.c (convert_move): Likewise.
(convert_modes): Likewise.
* fwprop.c (forward_propagate_subreg): Likewise.
* loop-iv.c (get_biv_step_1): Likewise.
* optabs.c (widen_operand): Likewise.
* postreload.c (move2add_valid_value_p): Likewise.
* recog.c (simplify_while_replacing): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise. Remove redundant
mode equality check.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251478
Diffstat (limited to 'gcc/postreload.c')
| -rw-r--r-- | gcc/postreload.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/gcc/postreload.c b/gcc/postreload.c index f76321d..38948dc 100644 --- a/gcc/postreload.c +++ b/gcc/postreload.c @@ -1699,14 +1699,16 @@ move2add_valid_value_p (int regno, machine_mode mode) if (mode != reg_mode[regno]) { - if (!MODES_OK_FOR_MOVE2ADD (mode, reg_mode[regno])) + scalar_int_mode old_mode; + if (!is_a <scalar_int_mode> (reg_mode[regno], &old_mode) + || !MODES_OK_FOR_MOVE2ADD (mode, old_mode)) return false; /* The value loaded into regno in reg_mode[regno] is also valid in mode after truncation only if (REG:mode regno) is the lowpart of (REG:reg_mode[regno] regno). Now, for big endian, the starting regno of the lowpart might be different. */ - int s_off = subreg_lowpart_offset (mode, reg_mode[regno]); - s_off = subreg_regno_offset (regno, reg_mode[regno], s_off, mode); + int s_off = subreg_lowpart_offset (mode, old_mode); + s_off = subreg_regno_offset (regno, old_mode, s_off, mode); if (s_off != 0) /* We could in principle adjust regno, check reg_mode[regno] to be BLKmode, and return s_off to the caller (vs. -1 for failure), |