re PR target/65697 (__atomic memory barriers not strong enough for __sync builtins)

2015-05-12  Andrew MacLeod  <amacleod@redhat.com>

	PR target/65697
	* coretypes.h (MEMMODEL_SYNC, MEMMODEL_BASE_MASK): New macros.
	(enum memmodel): Add SYNC_{ACQUIRE,RELEASE,SEQ_CST}.
	* tree.h (memmodel_from_int, memmodel_base, is_mm_relaxed,
	is_mm_consume,is_mm_acquire, is_mm_release, is_mm_acq_rel,
	is_mm_seq_cst, is_mm_sync): New accessor functions.
	* builtins.c (expand_builtin_sync_operation,
	expand_builtin_compare_and_swap): Use MEMMODEL_SYNC_SEQ_CST.
	(expand_builtin_sync_lock_release): Use MEMMODEL_SYNC_RELEASE.
	(get_memmodel,  expand_builtin_atomic_compare_exchange,
	expand_builtin_atomic_load, expand_builtin_atomic_store,
	expand_builtin_atomic_clear): Use new accessor routines.
	(expand_builtin_sync_synchronize): Use MEMMODEL_SYNC_SEQ_CST.
	* optabs.c (expand_compare_and_swap_loop): Use MEMMODEL_SYNC_SEQ_CST.
	(maybe_emit_sync_lock_test_and_set): Use new accessors and
	MEMMODEL_SYNC_ACQUIRE.
	(expand_sync_lock_test_and_set): Use MEMMODEL_SYNC_ACQUIRE.
	(expand_mem_thread_fence, expand_mem_signal_fence, expand_atomic_load,
	expand_atomic_store): Use new accessors.
	* emit-rtl.c (need_atomic_barrier_p): Add additional enum cases.
	* tsan.c (instrument_builtin_call): Update check for memory model beyond
	final enum to use MEMMODEL_LAST.
	* c-family/c-common.c: Use new accessor for memmodel_base.
	* config/aarch64/aarch64.c (aarch64_expand_compare_and_swap): Use new
	accessors.
	* config/aarch64/atomics.md (atomic_load<mode>,atomic_store<mode>,
	arch64_load_exclusive<mode>, aarch64_store_exclusive<mode>,
	mem_thread_fence, *dmb): Likewise.
	* config/alpha/alpha.c (alpha_split_compare_and_swap,
	alpha_split_compare_and_swap_12): Likewise.
	* config/arm/arm.c (arm_expand_compare_and_swap,
	arm_split_compare_and_swap, arm_split_atomic_op): Likewise.
	* config/arm/sync.md (atomic_load<mode>, atomic_store<mode>,
	atomic_loaddi): Likewise.
	* config/i386/i386.c (ix86_destroy_cost_data, ix86_memmodel_check):
	Likewise.
	* config/i386/sync.md (mem_thread_fence, atomic_store<mode>): Likewise.
	* config/ia64/ia64.c (ia64_expand_atomic_op): Add new memmodel cases and
	use new accessors.
	* config/ia64/sync.md (mem_thread_fence, atomic_load<mode>,
	atomic_store<mode>, atomic_compare_and_swap<mode>,
	atomic_exchange<mode>): Use new accessors.
	* config/mips/mips.c (mips_process_sync_loop): Likewise.
	* config/pa/pa.md (atomic_loaddi, atomic_storedi): Likewise.
	* config/rs6000/rs6000.c (rs6000_pre_atomic_barrier,
	rs6000_post_atomic_barrier): Add new cases.
	(rs6000_expand_atomic_compare_and_swap): Use new accessors.
	* config/rs6000/sync.md (mem_thread_fence): Add new cases.
	(atomic_load<mode>): Add new cases and use new accessors.
	(store_quadpti): Add new cases.
	* config/s390/s390.md (mem_thread_fence, atomic_store<mode>): Use new
	accessors.
	* config/sparc/sparc.c (sparc_emit_membar_for_model): Use new accessors.
	* doc/extend.texi: Update docs to indicate 16 bits are used for memory
	model, not 8.

From-SVN: r223096

1 files changed, 11 insertions, 12 deletions

diff --git a/gcc/optabs.c b/gcc/optabs.c
index fbf0e38..bd03fc1 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -7188,7 +7188,7 @@ expand_compare_and_swap_loop (rtx mem, rtx old_reg, rtx new_reg, rtx seq)
   success = NULL_RTX;
   oldval = cmp_reg;
   if (!expand_atomic_compare_and_swap (&success, &oldval, mem, old_reg,
-				       new_reg, false, MEMMODEL_SEQ_CST,
+				       new_reg, false, MEMMODEL_SYNC_SEQ_CST,
 				       MEMMODEL_RELAXED))
     return false;
 
@@ -7249,9 +7249,7 @@ maybe_emit_sync_lock_test_and_set (rtx target, rtx mem, rtx val,
      exists, and the memory model is stronger than acquire, add a release 
      barrier before the instruction.  */
 
-  if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST
-      || (model & MEMMODEL_MASK) == MEMMODEL_RELEASE
-      || (model & MEMMODEL_MASK) == MEMMODEL_ACQ_REL)
+  if (is_mm_seq_cst (model) || is_mm_release (model) || is_mm_acq_rel (model))
     expand_mem_thread_fence (model);
 
   if (icode != CODE_FOR_nothing)
@@ -7358,11 +7356,12 @@ expand_sync_lock_test_and_set (rtx target, rtx mem, rtx val)
   rtx ret;
 
   /* Try an atomic_exchange first.  */
-  ret = maybe_emit_atomic_exchange (target, mem, val, MEMMODEL_ACQUIRE);
+  ret = maybe_emit_atomic_exchange (target, mem, val, MEMMODEL_SYNC_ACQUIRE);
   if (ret)
     return ret;
 
-  ret = maybe_emit_sync_lock_test_and_set (target, mem, val, MEMMODEL_ACQUIRE);
+  ret = maybe_emit_sync_lock_test_and_set (target, mem, val,
+					   MEMMODEL_SYNC_ACQUIRE);
   if (ret)
     return ret;
 
@@ -7373,7 +7372,7 @@ expand_sync_lock_test_and_set (rtx target, rtx mem, rtx val)
   /* If there are no other options, try atomic_test_and_set if the value
      being stored is 1.  */
   if (val == const1_rtx)
-    ret = maybe_emit_atomic_test_and_set (target, mem, MEMMODEL_ACQUIRE);
+    ret = maybe_emit_atomic_test_and_set (target, mem, MEMMODEL_SYNC_ACQUIRE);
 
   return ret;
 }
@@ -7630,7 +7629,7 @@ expand_mem_thread_fence (enum memmodel model)
 {
   if (HAVE_mem_thread_fence)
     emit_insn (gen_mem_thread_fence (GEN_INT (model)));
-  else if ((model & MEMMODEL_MASK) != MEMMODEL_RELAXED)
+  else if (!is_mm_relaxed (model))
     {
       if (HAVE_memory_barrier)
 	emit_insn (gen_memory_barrier ());
@@ -7654,7 +7653,7 @@ expand_mem_signal_fence (enum memmodel model)
 {
   if (HAVE_mem_signal_fence)
     emit_insn (gen_mem_signal_fence (GEN_INT (model)));
-  else if ((model & MEMMODEL_MASK) != MEMMODEL_RELAXED)
+  else if (!is_mm_relaxed (model))
     {
       /* By default targets are coherent between a thread and the signal
 	 handler running on the same thread.  Thus this really becomes a
@@ -7709,7 +7708,7 @@ expand_atomic_load (rtx target, rtx mem, enum memmodel model)
     target = gen_reg_rtx (mode);
 
   /* For SEQ_CST, emit a barrier before the load.  */
-  if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
+  if (is_mm_seq_cst (model))
     expand_mem_thread_fence (model);
 
   emit_move_insn (target, mem);
@@ -7755,7 +7754,7 @@ expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release)
 	  if (maybe_expand_insn (icode, 2, ops))
 	    {
 	      /* lock_release is only a release barrier.  */
-	      if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
+	      if (is_mm_seq_cst (model))
 		expand_mem_thread_fence (model);
 	      return const0_rtx;
 	    }
@@ -7782,7 +7781,7 @@ expand_atomic_store (rtx mem, rtx val, enum memmodel model, bool use_release)
   emit_move_insn (mem, val);
 
   /* For SEQ_CST, also emit a barrier after the store.  */
-  if ((model & MEMMODEL_MASK) == MEMMODEL_SEQ_CST)
+  if (is_mm_seq_cst (model))
     expand_mem_thread_fence (model);
 
   return const0_rtx;