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author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-08-30 11:09:10 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2017-08-30 11:09:10 +0000 |
commit | e386a52f70c47499fff14a338fe17df691e886e2 (patch) | |
tree | bf21dc05503e220cd0d838c391f028ef314c252b /gcc/optabs.c | |
parent | 490d0f6c91c0c4fef57a5ffe438629b0687113de (diff) | |
download | gcc-e386a52f70c47499fff14a338fe17df691e886e2.zip gcc-e386a52f70c47499fff14a338fe17df691e886e2.tar.gz gcc-e386a52f70c47499fff14a338fe17df691e886e2.tar.bz2 |
[7/77] Add scalar_float_mode
This patch adds a scalar_float_mode class, which wraps a mode enum
that is known to satisfy SCALAR_FLOAT_MODE_P. Things like "SFmode"
now give a scalar_float_mode object instead of a machine_mode.
This in turn needs a change to the real.h format_helper, so that
it can accept both machine_modes and scalar_float_modes.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* coretypes.h (scalar_float_mode): New type.
* machmode.h (mode_traits::from_int): Use machine_mode if
USE_ENUM_MODES is defined.
(is_a): New function.
(as_a): Likewise.
(dyn_cast): Likewise.
(scalar_float_mode): New class.
(scalar_float_mode::includes_p): New function.
(is_float_mode): Likewise.
* gdbhooks.py (MachineModePrinter): New class.
(build_pretty_printer): Use it for scalar_float_mode.
* real.h (FLOAT_MODE_FORMAT): Use as_a <scalar_float_mode>.
(format_helper::format_helper): Turn into a template.
* genmodes.c (get_mode_class): New function.
(emit_insn_modes_h): Give modes the class returned by get_mode_class,
or machine_mode if none.
* config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Use
as_a <scalar_float_mode>.
* dwarf2out.c (mem_loc_descriptor): Likewise.
(insert_float): Likewise.
(add_const_value_attribute): Likewise.
* simplify-rtx.c (simplify_immed_subreg): Likewise.
* optabs.c (expand_absneg_bit): Take a scalar_float_mode.
(expand_unop): Update accordingly.
(expand_abs_nojump): Likewise.
(expand_copysign_absneg): Take a scalar_float_mode.
(expand_copysign_bit): Likewise.
(expand_copysign): Update accordingly.
gcc/ada/
* gcc-interface/utils.c (gnat_type_for_mode): Use is_a
<scalar_float_mode> instead of SCALAR_FLOAT_MODE_P.
gcc/go/
* go-lang.c (go_langhook_type_for_mode): Use is_float_mode.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251458
Diffstat (limited to 'gcc/optabs.c')
-rw-r--r-- | gcc/optabs.c | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/gcc/optabs.c b/gcc/optabs.c index c6ad64b..5c9cd34 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -2552,7 +2552,7 @@ lowpart_subreg_maybe_copy (machine_mode omode, rtx val, logical operation on the sign bit. */ static rtx -expand_absneg_bit (enum rtx_code code, machine_mode mode, +expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, rtx op0, rtx target) { const struct real_format *fmt; @@ -2698,6 +2698,7 @@ expand_unop (machine_mode mode, optab unoptab, rtx op0, rtx target, { enum mode_class mclass = GET_MODE_CLASS (mode); machine_mode wider_mode; + scalar_float_mode float_mode; rtx temp; rtx libfunc; @@ -2888,9 +2889,9 @@ expand_unop (machine_mode mode, optab unoptab, rtx op0, rtx target, if (optab_to_code (unoptab) == NEG) { /* Try negating floating point values by flipping the sign bit. */ - if (SCALAR_FLOAT_MODE_P (mode)) + if (is_a <scalar_float_mode> (mode, &float_mode)) { - temp = expand_absneg_bit (NEG, mode, op0, target); + temp = expand_absneg_bit (NEG, float_mode, op0, target); if (temp) return temp; } @@ -3087,9 +3088,10 @@ expand_abs_nojump (machine_mode mode, rtx op0, rtx target, return temp; /* For floating point modes, try clearing the sign bit. */ - if (SCALAR_FLOAT_MODE_P (mode)) + scalar_float_mode float_mode; + if (is_a <scalar_float_mode> (mode, &float_mode)) { - temp = expand_absneg_bit (ABS, mode, op0, target); + temp = expand_absneg_bit (ABS, float_mode, op0, target); if (temp) return temp; } @@ -3244,7 +3246,7 @@ expand_one_cmpl_abs_nojump (machine_mode mode, rtx op0, rtx target) and not playing with subregs so much, will help the register allocator. */ static rtx -expand_copysign_absneg (machine_mode mode, rtx op0, rtx op1, rtx target, +expand_copysign_absneg (scalar_float_mode mode, rtx op0, rtx op1, rtx target, int bitpos, bool op0_is_abs) { machine_mode imode; @@ -3328,7 +3330,7 @@ expand_copysign_absneg (machine_mode mode, rtx op0, rtx op1, rtx target, is true if op0 is known to have its sign bit clear. */ static rtx -expand_copysign_bit (machine_mode mode, rtx op0, rtx op1, rtx target, +expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, int bitpos, bool op0_is_abs) { machine_mode imode; @@ -3426,12 +3428,12 @@ expand_copysign_bit (machine_mode mode, rtx op0, rtx op1, rtx target, rtx expand_copysign (rtx op0, rtx op1, rtx target) { - machine_mode mode = GET_MODE (op0); + scalar_float_mode mode; const struct real_format *fmt; bool op0_is_abs; rtx temp; - gcc_assert (SCALAR_FLOAT_MODE_P (mode)); + mode = as_a <scalar_float_mode> (GET_MODE (op0)); gcc_assert (GET_MODE (op1) == mode); /* First try to do it with a special instruction. */ |