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author | Andrew MacLeod <amacleod@redhat.com> | 2011-11-29 19:42:44 +0000 |
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committer | Andrew Macleod <amacleod@gcc.gnu.org> | 2011-11-29 19:42:44 +0000 |
commit | 91f59d8bf44e24f67a9194dfdfdbad4b7279b772 (patch) | |
tree | 0941a5f3f350e92aa547e0c78f48f37d4ee5250d /gcc/optabs.c | |
parent | 421ecf992e5c8971c4b47b39e71bc622527b859d (diff) | |
download | gcc-91f59d8bf44e24f67a9194dfdfdbad4b7279b772.zip gcc-91f59d8bf44e24f67a9194dfdfdbad4b7279b772.tar.gz gcc-91f59d8bf44e24f67a9194dfdfdbad4b7279b772.tar.bz2 |
re PR target/50123 (cmpxchg generated for atomic and with zero/or with -1)
2011-11-29 Andrew MacLeod <amacleod@redhat.com>
PR target/50123
* optabs.c (maybe_optimize_fetch_op): New. Look for more optimal
instructions for a FECTH_OP or OP_FECTH sequence.
(expand_atomic_fetch_op): Call maybe_optimize_fetch_op.
* testsuite/gcc.dg/atomic-op-optimize.c: New. Test for optimizations.
From-SVN: r181815
Diffstat (limited to 'gcc/optabs.c')
-rw-r--r-- | gcc/optabs.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/gcc/optabs.c b/gcc/optabs.c index a1917cc..c3f81df 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -7943,6 +7943,41 @@ get_atomic_op_for_code (struct atomic_op_functions *op, enum rtx_code code) } } +/* See if there is a more optimal way to implement the operation "*MEM CODE VAL" + using memory order MODEL. If AFTER is true the operation needs to return + the value of *MEM after the operation, otherwise the previous value. + TARGET is an optional place to place the result. The result is unused if + it is const0_rtx. + Return the result if there is a better sequence, otherwise NULL_RTX. */ + +static rtx +maybe_optimize_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code, + enum memmodel model, bool after) +{ + /* If the value is prefetched, or not used, it may be possible to replace + the sequence with a native exchange operation. */ + if (!after || target == const0_rtx) + { + /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */ + if (code == AND && val == const0_rtx) + { + if (target == const0_rtx) + target = gen_reg_rtx (GET_MODE (mem)); + return maybe_emit_atomic_exchange (target, mem, val, model); + } + + /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */ + if (code == IOR && val == constm1_rtx) + { + if (target == const0_rtx) + target = gen_reg_rtx (GET_MODE (mem)); + return maybe_emit_atomic_exchange (target, mem, val, model); + } + } + + return NULL_RTX; +} + /* Try to emit an instruction for a specific operation varaition. OPTAB contains the OP functions. TARGET is an optional place to return the result. const0_rtx means unused. @@ -8028,6 +8063,11 @@ expand_atomic_fetch_op (rtx target, rtx mem, rtx val, enum rtx_code code, get_atomic_op_for_code (&optab, code); + /* Check to see if there are any better instructions. */ + result = maybe_optimize_fetch_op (target, mem, val, code, model, after); + if (result) + return result; + /* Check for the case where the result isn't used and try those patterns. */ if (unused_result) { |