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author | Wilco Dijkstra <wdijkstr@arm.com> | 2016-05-16 12:52:22 +0000 |
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committer | Wilco Dijkstra <wilco@gcc.gnu.org> | 2016-05-16 12:52:22 +0000 |
commit | 954224d7318d36379c7c997d51cc72ce1e62a7e7 (patch) | |
tree | fdeba8af3678fe80c94540dd5ebc68408e453993 /gcc/omp-low.c | |
parent | e6e89f0d17162bbefd16000f65110d49a4541d41 (diff) | |
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Some patterns are using '%w2' for immediate operands...
Some patterns are using '%w2' for immediate operands, which means that a zero
immediate is actually emitted as 'wzr' or 'xzr'. This not only changes an
immediate operand into a register operand but may emit illegal instructions
from legal RTL (eg. ORR x0, SP, xzr rather than ORR x0, SP, 0).
* config/aarch64/aarch64.md
(add<mode>3_compareC_cconly_imm): Remove use of %w.
(add<mode>3_compareC_imm): Likewise.
(<optab>si3_uxtw): Split into register and immediate variants.
(andsi3_compare0_uxtw): Likewise.
(and<mode>3_compare0): Likewise.
(and<mode>3nr_compare0): Likewise.
(stack_protect_test_<mode>): Don't use %x for memory operands.
From-SVN: r236285
Diffstat (limited to 'gcc/omp-low.c')
0 files changed, 0 insertions, 0 deletions