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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2016-08-12 19:40:37 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2016-08-12 19:40:37 +0000 |
| commit | e86aefb8e955a9545ffd16c960ff70cbad5fc9ad (patch) | |
| tree | 4d26a414fc4a986fb7a186ae3f68288ec0678c07 /gcc/multiple_target.c | |
| parent | b1ad9be2e8170ead78f7522e7647111f3bc0dc6f (diff) | |
| download | gcc-e86aefb8e955a9545ffd16c960ff70cbad5fc9ad.zip gcc-e86aefb8e955a9545ffd16c960ff70cbad5fc9ad.tar.gz gcc-e86aefb8e955a9545ffd16c960ff70cbad5fc9ad.tar.bz2 | |
vsx.md (vsx_concat_<mode>): Add support for the ISA 3.0 MTVSRDD instruction.
[gcc]
2016-08-12 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/vsx.md (vsx_concat_<mode>): Add support for the
ISA 3.0 MTVSRDD instruction.
(vsx_splat_<mode>): Change cpu type of MTVSRDD instruction to
vecperm.
[gcc/testsuite]
2016-08-12 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-init-1.c: New tests to test various
vector initialization options.
* gcc.target/powerpc/vec-init-2.c: Likewise.
* gcc.target/powerpc/vec-init-3.c: New test to make sure MTVSRDD
is generated on ISA 3.0.
From-SVN: r239428
Diffstat (limited to 'gcc/multiple_target.c')
0 files changed, 0 insertions, 0 deletions