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authorRichard Sandiford <richard.sandiford@linaro.org>2018-01-03 21:43:17 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2018-01-03 21:43:17 +0000
commit6ce12f6a1647ec2831f3c5908ecf9c23ae191d02 (patch)
tree8c22889b700a21e7d4fe8da29c0d38b16c371d2c /gcc/machmode.h
parent5c0caeb37ff72cfd9153e164e9fd9eec7d56e969 (diff)
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Allow targets to pick a vector prefix other than "V"
Originally the SVE port used the names for 256-bit vectors, as the next available increment after Advanced SIMD. However, that was always a bit of a hack and is bound to confuse people new to the code. Nothing actually requires vector modes to have names of the form V<nunits><mode>, and after talking it over with the AArch64 maintainers, we agreed to switch to things like: VNx16QI instead. This patch lets targets pick this kind of prefix. 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * machmode.def (VECTOR_MODES_WITH_PREFIX): Document. * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro. (VECTOR_MODES): Use it. (make_vector_modes): Take the prefix as an argument. From-SVN: r256203
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