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author | Pan Li <pan2.li@intel.com> | 2023-05-13 21:05:06 +0800 |
---|---|---|
committer | Pan Li <pan2.li@intel.com> | 2023-05-18 17:15:10 +0800 |
commit | b14af304965c20111ebd01d0c916353c927d9151 (patch) | |
tree | fff6f63c3ecdf572ae54a86accbb601d7dffca04 /gcc/machmode.h | |
parent | 6657950d523e5289ff2b95c1e523b177dfd21bc0 (diff) | |
download | gcc-b14af304965c20111ebd01d0c916353c927d9151.zip gcc-b14af304965c20111ebd01d0c916353c927d9151.tar.gz gcc-b14af304965c20111ebd01d0c916353c927d9151.tar.bz2 |
Machine_Mode: Extend machine_mode from 8 to 16 bits
We are running out of the machine_mode(8 bits) in RISC-V backend. Thus
we would like to extend the machine_mode bit size from 8 to 16 bits.
However, it is sensitive to extend the memory size in common structure
like tree or rtx. This patch would like to extend the machine_mode bits
to 16 bits by shrinking, like:
* Swap the bit size of code and machine code in rtx_def.
* Adjust the machine_mode location and spare in tree.
The memory impact of this patch for correlated structure looks like below:
+-------------------+----------+---------+------+
| struct/bytes | upstream | patched | diff |
+-------------------+----------+---------+------+
| rtx_obj_reference | 8 | 12 | +4 |
| ext_modified | 2 | 4 | +2 |
| ira_allocno | 192 | 184 | -8 |
| qty_table_elem | 40 | 40 | 0 |
| reg_stat_type | 64 | 64 | 0 |
| rtx_def | 40 | 40 | 0 |
| table_elt | 80 | 80 | 0 |
| tree_decl_common | 112 | 112 | 0 |
| tree_type_common | 128 | 128 | 0 |
| access_info | 8 | 8 | 0 |
+-------------------+----------+---------+------+
The tree and rtx related struct has no memory changes after this patch,
and the machine_mode changes to 16 bits already.
Signed-off-by: Pan Li <pan2.li@intel.com>
Co-authored-by: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
Co-Authored-By: Richard Biener <rguenther@suse.de>
Co-Authored-By: Richard Sandiford <richard.sandiford@arm.com>
gcc/ChangeLog:
* combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
* cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
(struct table_elt): Extend machine_mode to 16 bits.
(struct set): Ditto.
* genmodes.cc (emit_mode_wider): Extend type from char to short.
(emit_mode_complex): Ditto.
(emit_mode_inner): Ditto.
(emit_class_narrowest_mode): Ditto.
* genopinit.cc (main): Extend the machine_mode limit.
* ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
re-ordered the struct fields for padding.
* machmode.h (MACHINE_MODE_BITSIZE): New macro.
(GET_MODE_2XWIDER_MODE): Extend type from char to short.
(get_mode_alignment): Extend type from char to short.
* ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
removed the ATTRIBUTE_PACKED.
* rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
* rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
m_kind to 2 bits and remove m_spare.
* rtl.h (RTX_CODE_BITSIZE): New macro.
(struct rtx_def): Swap both the bit size and location between the
rtx_code and the machine_mode.
(subreg_shape::unique_id): Extend the machine_mode limit.
* rtlanal.h: Extend machine_mode to 16 bits.
* tree-core.h (struct tree_type_common): Extend machine_mode to 16
bits and re-ordered the struct fields for padding.
(struct tree_decl_common): Extend machine_mode to 16 bits.
Diffstat (limited to 'gcc/machmode.h')
-rw-r--r-- | gcc/machmode.h | 27 |
1 files changed, 21 insertions, 6 deletions
diff --git a/gcc/machmode.h b/gcc/machmode.h index f1865c1..a22df60 100644 --- a/gcc/machmode.h +++ b/gcc/machmode.h @@ -24,13 +24,13 @@ typedef opt_mode<machine_mode> opt_machine_mode; extern CONST_MODE_SIZE poly_uint16_pod mode_size[NUM_MACHINE_MODES]; extern CONST_MODE_PRECISION poly_uint16_pod mode_precision[NUM_MACHINE_MODES]; -extern const unsigned char mode_inner[NUM_MACHINE_MODES]; +extern const unsigned short mode_inner[NUM_MACHINE_MODES]; extern CONST_MODE_NUNITS poly_uint16_pod mode_nunits[NUM_MACHINE_MODES]; extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES]; extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES]; -extern const unsigned char mode_next[NUM_MACHINE_MODES]; -extern const unsigned char mode_wider[NUM_MACHINE_MODES]; -extern const unsigned char mode_2xwider[NUM_MACHINE_MODES]; +extern const unsigned short mode_next[NUM_MACHINE_MODES]; +extern const unsigned short mode_wider[NUM_MACHINE_MODES]; +extern const unsigned short mode_2xwider[NUM_MACHINE_MODES]; template<typename T> struct mode_traits @@ -242,6 +242,21 @@ extern const unsigned char mode_class[NUM_MACHINE_MODES]; || CLASS == MODE_ACCUM \ || CLASS == MODE_UACCUM) +/* The MACHINE_MODE_BITSIZE should be exactly aligned with the type of the + machine_mode array in the machmode.h and genmodes.cc. For example as below. + +------------------------+-------+ + | MACHINE_MODE_BITSIZE | 16 | + +------------------------+-------+ + | mode_inter[] | short | + | mode_next[] | short | + | mode_wider[] | short | + | mode_2xwider[] | short | + | mode_complex[] | short | + | class_narrowest_mode[] | short | + +------------------------+-------+ + */ +#define MACHINE_MODE_BITSIZE 16 + /* An optional T (i.e. a T or nothing), where T is some form of mode class. */ template<typename T> class opt_mode @@ -797,7 +812,7 @@ GET_MODE_2XWIDER_MODE (const T &m) } /* Get the complex mode from the component mode. */ -extern const unsigned char mode_complex[NUM_MACHINE_MODES]; +extern const unsigned short mode_complex[NUM_MACHINE_MODES]; #define GET_MODE_COMPLEX_MODE(MODE) ((machine_mode) mode_complex[MODE]) /* Represents a machine mode that must have a fixed size. The main @@ -946,7 +961,7 @@ extern unsigned get_mode_alignment (machine_mode); /* For each class, get the narrowest mode in that class. */ -extern const unsigned char class_narrowest_mode[MAX_MODE_CLASS]; +extern const unsigned short class_narrowest_mode[MAX_MODE_CLASS]; #define GET_CLASS_NARROWEST_MODE(CLASS) \ ((machine_mode) class_narrowest_mode[CLASS]) |