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authorPip Cet <pipcet@gmail.com>2016-11-17 16:16:38 +0000
committerEric Botcazou <ebotcazou@gcc.gnu.org>2016-11-17 16:16:38 +0000
commit86a21121ace5a75de9d57b4b9bd691388e0367bc (patch)
tree8a67841dfc46ed98537f8cc1ed7522c6ee4a7d5d /gcc/lra-constraints.c
parentcc4aa6592b3822043ab5d6b1fad958b9bc21acbd (diff)
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re PR rtl-optimization/78355 (LRA generates unaligned accesses when SLOW_UNALIGNED_ACCESS is 1)
PR rtl-optimization/78355 * doc/tm.texi.in (SLOW_UNALIGNED_ACCESS): Document that the macro only needs to deal with unaligned accesses. * doc/tm.texi: Regenerate. * lra-constraints.c (simplify_operand_subreg): Only invoke SLOW_UNALIGNED_ACCESS on innermode if the MEM is not aligned enough. Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com> From-SVN: r242554
Diffstat (limited to 'gcc/lra-constraints.c')
-rw-r--r--gcc/lra-constraints.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index b592168..56b65ef 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -1486,9 +1486,10 @@ simplify_operand_subreg (int nop, machine_mode reg_mode)
equivalences in function lra_constraints) and because for spilled
pseudos we allocate stack memory enough for the biggest
corresponding paradoxical subreg. */
- if (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg))
- || SLOW_UNALIGNED_ACCESS (innermode, MEM_ALIGN (reg))
- || MEM_ALIGN (reg) >= GET_MODE_ALIGNMENT (mode))
+ if (!(MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (mode)
+ && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg)))
+ || (MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (innermode)
+ && SLOW_UNALIGNED_ACCESS (innermode, MEM_ALIGN (reg))))
return true;
/* INNERMODE is fast, MODE slow. Reload the mem in INNERMODE. */