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authorPhilipp Tomsich <philipp.tomsich@vrull.eu>2022-09-14 14:16:27 +0200
committerPhilipp Tomsich <philipp.tomsich@vrull.eu>2022-11-18 21:15:24 +0100
commit787ac95917a666b3d186e2d5afec07ee5b75c6df (patch)
tree226dc225e6f03496f02c9783675e857eb0f0bb5f /gcc/jit
parent30c2d8df173a6f3ca145cda9f9e261616fca8467 (diff)
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RISC-V: Optimize slli(.uw)? + addw + zext.w into sh[123]add + zext.w
gcc/ChangeLog: * config/riscv/bitmanip.md: Handle corner-cases for combine when chaining slli(.uw)? + addw * config/riscv/riscv-protos.h (riscv_shamt_matches_mask_p): Define prototype. * config/riscv/riscv.cc (riscv_shamt_matches_mask_p): Helper for evaluating the relationship between two operands. gcc/testsuite/ChangeLog: * gcc.target/riscv/zba-shNadd-04.c: New test.
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