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authorRichard Sandiford <rdsandiford@googlemail.com>2010-07-12 19:03:06 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2010-07-12 19:03:06 +0000
commitafcc66c49afbb6e971a70f503b96d1fd1a41f7c5 (patch)
tree9434cb86560bce7c7cc8fe82277a1394b43bf551 /gcc/ira.h
parent4391924a335032f89f99247f2dad59c4b47b7a7a (diff)
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Makefile.in (target-globals.o): Depend on $(IRA_INT_H).
gcc/ * Makefile.in (target-globals.o): Depend on $(IRA_INT_H). * ira-int.h (ira_max_nregs, ira_important_class_nums): Delete. (target_ira_int): New structure. (default_target_ira_int): Declare. (this_target_ira_int): Declare as a variable or define as a macro. (ira_reg_mode_hard_regset, ira_register_move_cost) (ira_may_move_in_cost, ira_may_move_out_cost, ira_class_subset_p) (ira_non_ordered_class_hard_regs, ira_class_hard_reg_index) (prohibited_class_mode_regs, ira_important_classes_num) (ira_important_classes, ira_reg_class_intersect) (ira_reg_classes_intersect_p, ira_reg_class_super_classes) (ira_reg_class_union): Redefine as macros. * ira.h (target_ira): New structure. (default_target_ira): Declare. (this_target_ira): Declare as a variable or define as a macro. (ira_available_class_regs, ira_hard_regno_cover_class) (ira_reg_class_cover_size, ira_reg_class_cover, ira_class_translate) (ira_reg_class_nregs, ira_memory_move_cost, ira_class_hard_regs) (ira_class_hard_regs_num): Redefine as macros. * ira.c (default_target_ira, default_target_ira_int): New variables. (this_target_ira, this_target_ira_int): New conditional variables. (ira_reg_mode_hard_regset, ira_memory_move_cost) (ira_register_move_cost, ira_may_move_in_cost, ira_may_move_out_cost) (ira_class_subset_p): Delete. (no_unit_alloc_regs): Redefine as a macro. (ira_class_hard_regs, ira_non_ordered_class_hard_regs) (ira_class_hard_regs_num, ira_class_hard_reg_index) (ira_available_class_regs): Delete. (alloc_reg_class_subclasses): Redefine as a macro. (ira_reg_class_cover_size, ira_reg_class_cover) (ira_important_classes_num, ira_important_classes) (ira_important_class_nums, ira_class_translate): Delete. (cover_class_order): Document the variable's lifetime. (reorder_important_classes): Don't set ira_important_class_nums. (ira_reg_class_intersect, ira_reg_classes_intersect_p) (ira_reg_class_super_classes, ira_reg_class_union) (ira_hard_regno_cover_class, ira_reg_class_nregs, ira_max_nregs): Delete. (setup_reg_class_nregs): Don't set ira_max_regs. (prohibited_class_mode_regs): Delete. * target-globals.h (this_target_ira, this_target_ira_int): Declare. (target_globals): Add ira and ira_int fields. (restore_target_globals): Copy the ira field to this_target_ira and the ira_int field to this_target_ira_int. * target-globals.c: Include ira-int.h. (default_target_globals): Initialize the ira and ira_int fields. (save_target_globals): Likewise. From-SVN: r162102
Diffstat (limited to 'gcc/ira.h')
-rw-r--r--gcc/ira.h110
1 files changed, 69 insertions, 41 deletions
diff --git a/gcc/ira.h b/gcc/ira.h
index 12b4b42..46ea89e 100644
--- a/gcc/ira.h
+++ b/gcc/ira.h
@@ -20,36 +20,6 @@ You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/* Number of given class hard registers available for the register
- allocation for given classes. */
-extern int ira_available_class_regs[N_REG_CLASSES];
-
-/* Map: hard register number -> cover class it belongs to. If the
- corresponding class is NO_REGS, the hard register is not available
- for allocation. */
-extern enum reg_class ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER];
-
-/* Number of cover classes. Cover classes is non-intersected register
- classes containing all hard-registers available for the
- allocation. */
-extern int ira_reg_class_cover_size;
-
-/* The array containing cover classes (see also comments for macro
- IRA_COVER_CLASSES). Only first IRA_REG_CLASS_COVER_SIZE elements are
- used for this. */
-extern enum reg_class ira_reg_class_cover[N_REG_CLASSES];
-
-/* Map of all register classes to corresponding cover class containing
- the given class. If given class is not a subset of a cover class,
- we translate it into the cheapest cover class. */
-extern enum reg_class ira_class_translate[N_REG_CLASSES];
-
-/* Map: register class x machine mode -> number of hard registers of
- given class needed to store value of given mode. If the number for
- some hard-registers of the register class is different, the size
- will be negative. */
-extern int ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
-
/* Function specific hard registers can not be used for the register
allocation. */
extern HARD_REG_SET ira_no_alloc_regs;
@@ -58,17 +28,75 @@ extern HARD_REG_SET ira_no_alloc_regs;
mode or when the conflict table is too big. */
extern bool ira_conflicts_p;
-/* Array analogous to target hook TARGET_MEMORY_MOVE_COST. */
-extern short ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
-
-/* Array of number of hard registers of given class which are
- available for the allocation. The order is defined by the
- allocation order. */
-extern short ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
-
-/* The number of elements of the above array for given register
- class. */
-extern int ira_class_hard_regs_num[N_REG_CLASSES];
+struct target_ira {
+ /* Number of given class hard registers available for the register
+ allocation for given classes. */
+ int x_ira_available_class_regs[N_REG_CLASSES];
+
+ /* Map: hard register number -> cover class it belongs to. If the
+ corresponding class is NO_REGS, the hard register is not available
+ for allocation. */
+ enum reg_class x_ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER];
+
+ /* Number of cover classes. Cover classes is non-intersected register
+ classes containing all hard-registers available for the
+ allocation. */
+ int x_ira_reg_class_cover_size;
+
+ /* The array containing cover classes (see also comments for macro
+ IRA_COVER_CLASSES;. Only first IRA_REG_CLASS_COVER_SIZE elements are
+ used for this. */
+ enum reg_class x_ira_reg_class_cover[N_REG_CLASSES];
+
+ /* Map of all register classes to corresponding cover class containing
+ the given class. If given class is not a subset of a cover class,
+ we translate it into the cheapest cover class. */
+ enum reg_class x_ira_class_translate[N_REG_CLASSES];
+
+ /* Map: register class x machine mode -> number of hard registers of
+ given class needed to store value of given mode. If the number for
+ some hard-registers of the register class is different, the size
+ will be negative. */
+ int x_ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
+
+ /* Array analogous to target hook TARGET_MEMORY_MOVE_COST. */
+ short x_ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
+
+ /* Array of number of hard registers of given class which are
+ available for the allocation. The order is defined by the
+ allocation order. */
+ short x_ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
+
+ /* The number of elements of the above array for given register
+ class. */
+ int x_ira_class_hard_regs_num[N_REG_CLASSES];
+};
+
+extern struct target_ira default_target_ira;
+#if SWITCHABLE_TARGET
+extern struct target_ira *this_target_ira;
+#else
+#define this_target_ira (&default_target_ira)
+#endif
+
+#define ira_available_class_regs \
+ (this_target_ira->x_ira_available_class_regs)
+#define ira_hard_regno_cover_class \
+ (this_target_ira->x_ira_hard_regno_cover_class)
+#define ira_reg_class_cover_size \
+ (this_target_ira->x_ira_reg_class_cover_size)
+#define ira_reg_class_cover \
+ (this_target_ira->x_ira_reg_class_cover)
+#define ira_class_translate \
+ (this_target_ira->x_ira_class_translate)
+#define ira_reg_class_nregs \
+ (this_target_ira->x_ira_reg_class_nregs)
+#define ira_memory_move_cost \
+ (this_target_ira->x_ira_memory_move_cost)
+#define ira_class_hard_regs \
+ (this_target_ira->x_ira_class_hard_regs)
+#define ira_class_hard_regs_num \
+ (this_target_ira->x_ira_class_hard_regs_num)
extern void ira_init_once (void);
extern void ira_init (void);