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authorVladimir Makarov <vmakarov@redhat.com>2011-05-26 21:01:57 +0000
committerVladimir Makarov <vmakarov@gcc.gnu.org>2011-05-26 21:01:57 +0000
commit574e418a27bf8e841df886a8156b9e1e6b362fc7 (patch)
tree06ba6c60df2ad67988dc916ce7e15f8feb0db86b /gcc/ira.c
parent1eb2a14d1670a17b084e4fb33757a5fb6d7eefbd (diff)
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re PR rtl-optimization/49154 (build fails on cris-elf in libgcc: ICE in setup_pressure_classes, at ira.c:902)
2011-05-26 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/49154 * ira.c (setup_pressure_classes): Process class without sublcasses as a candidate for pressure classes. From-SVN: r174309
Diffstat (limited to 'gcc/ira.c')
-rw-r--r--gcc/ira.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/gcc/ira.c b/gcc/ira.c
index 358ad0a..222d48e 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -799,7 +799,12 @@ setup_pressure_classes (void)
{
if (ira_available_class_regs[cl] == 0)
continue;
- if (ira_available_class_regs[cl] != 1)
+ if (ira_available_class_regs[cl] != 1
+ /* A register class without subclasses may contain a few
+ hard registers and movement between them is costly
+ (e.g. SPARC FPCC registers). We still should consider it
+ as a candidate for a pressure class. */
+ && alloc_reg_class_subclasses[cl][0] != LIM_REG_CLASSES)
{
/* Check that the moves between any hard registers of the
current class are not more expensive for a legal mode