common.md: New file.

gcc/
	* common.md: New file.
	* doc/md.texi: Update description of generic, machine-independent
	constraints.
	* config/s390/constraints.md (e): Delete.
	* Makefile.in (md_file): Include common.md.
	* config/m32c/t-m32c (md_file): Likewise.
	* genpreds.c (general_mem): New array.
	(generic_constraint_letters): Remove constraints now defined by
	common.md.
	(add_constraint): Map TARGET_MEM_CONSTRAINT to general_mem.
	Allow the first character to be '<' or '>' as well.
	* genoutput.c (general_mem): New array.
	(indep_constraints): Remove constraints now defined by common.md.
	(note_constraint): Map TARGET_MEM_CONSTRAINT to general_mem.
	Remove special handling of 'm'.
	* ira-costs.c (record_reg_classes): Remove special handling of
	constraints now defined by common.md.
	* ira.c (ira_setup_alts, ira_get_dup_out_num): Likewise.
	* ira-lives.c (single_reg_class): Likewise.
	(ira_implicitly_set_insn_hard_regs): Likewise.
	* lra-constraints.c (reg_class_from_constraints): Likewise.
	(process_alt_operands, process_address, curr_insn_transform): Likewise.
	* postreload.c (reload_cse_simplify_operands): Likewise.
	* reload.c (push_secondary_reload, scratch_reload_class)
	(find_reloads, alternative_allows_const_pool_ref): Likewise.
	* reload1.c (maybe_fix_stack_asms): Likewise.
	* targhooks.c (default_secondary_reload): Likewise.
	* stmt.c (parse_output_constraint): Likewise.
	* recog.c (preprocess_constraints): Likewise.
	(constrain_operands, peep2_find_free_register): Likewise.
	(asm_operand_ok): Likewise, but add a comment saying why 'o'
	must be handled specially.

From-SVN: r211475

1 files changed, 15 insertions, 82 deletions

diff --git a/gcc/ira-lives.c b/gcc/ira-lives.c
index af8ec2b..601613b 100644
--- a/gcc/ira-lives.c
+++ b/gcc/ira-lives.c
@@ -771,60 +771,10 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const)
     else if (enabled & 1)
       switch (c)
 	{
-	case ' ':
-	case '\t':
-	case '=':
-	case '+':
-	case '*':
-	case '&':
-	case '%':
-	case '!':
-	case '?':
-	  break;
-	case 'i':
-	  if (CONSTANT_P (op)
-	      || (equiv_const != NULL_RTX && CONSTANT_P (equiv_const)))
-	    return NO_REGS;
-	  break;
-
-	case 'n':
-	  if (CONST_SCALAR_INT_P (op)
-	      || (equiv_const != NULL_RTX && CONST_SCALAR_INT_P (equiv_const)))
-	    return NO_REGS;
-	  break;
-
-	case 's':
-	  if ((CONSTANT_P (op) && !CONST_SCALAR_INT_P (op))
-	      || (equiv_const != NULL_RTX
-		  && CONSTANT_P (equiv_const)
-		  && !CONST_SCALAR_INT_P (equiv_const)))
-	    return NO_REGS;
-	  break;
-
-	case 'E':
-	case 'F':
-	  if (CONST_DOUBLE_AS_FLOAT_P (op) 
-	      || (GET_CODE (op) == CONST_VECTOR
-		  && GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_FLOAT)
-	      || (equiv_const != NULL_RTX
-		  && (CONST_DOUBLE_AS_FLOAT_P (equiv_const)
-		      || (GET_CODE (equiv_const) == CONST_VECTOR
-			  && (GET_MODE_CLASS (GET_MODE (equiv_const))
-			      == MODE_VECTOR_FLOAT)))))
-	    return NO_REGS;
-	  break;
+	case 'g':
+	  return NO_REGS;
 
-	case 'I': case 'J': case 'K': case 'L': case 'M': case 'N':
-	case 'O': case 'P':
-	case 'G': case 'H':
-	case 'r':
-	case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
-	case 'h': case 'j': case 'k': case 'l':
-	case 'q': case 't': case 'u':
-	case 'v': case 'w': case 'x': case 'y': case 'z':
-	case 'A': case 'B': case 'C': case 'D':
-	case 'Q': case 'R': case 'S': case 'T': case 'U':
-	case 'W': case 'Y': case 'Z':
+	default:
 	  /* ??? Is this the best way to handle memory constraints?  */
 	  cn = lookup_constraint (constraints);
 	  if (insn_extra_memory_constraint (cn)
@@ -835,9 +785,7 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const)
 		  && CONSTANT_P (equiv_const)
 		  && constraint_satisfied_p (equiv_const, cn)))
 	    return NO_REGS;
-	  next_cl = (c == 'r'
-		     ? GENERAL_REGS
-		     : reg_class_for_constraint (cn));
+	  next_cl = reg_class_for_constraint (cn);
 	  if (next_cl == NO_REGS)
 	    break;
 	  if (cl == NO_REGS
@@ -860,9 +808,6 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const)
 	    return NO_REGS;
 	  cl = next_cl;
 	  break;
-
-	default:
-	  return NO_REGS;
 	}
   return cl;
 }
@@ -913,29 +858,17 @@ ira_implicitly_set_insn_hard_regs (HARD_REG_SET *set)
 	    else if (c == ',')
 	      enabled >>= 1;
 	    else if (enabled & 1)
-	      switch (c)
-		{
-		case 'r':
-		case 'a': case 'b': case 'c': case 'd': case 'e': case 'f':
-		case 'h': case 'j': case 'k': case 'l':
-		case 'q': case 't': case 'u':
-		case 'v': case 'w': case 'x': case 'y': case 'z':
-		case 'A': case 'B': case 'C': case 'D':
-		case 'Q': case 'R': case 'S': case 'T': case 'U':
-		case 'W': case 'Y': case 'Z':
-		  cl = (c == 'r'
-			? GENERAL_REGS
-			: reg_class_for_constraint (lookup_constraint (p)));
-		  if (cl != NO_REGS)
-		    {
-		      /* There is no register pressure problem if all of the
-			 regs in this class are fixed.  */
-		      int regno = ira_class_singleton[cl][mode];
-		      if (regno >= 0)
-			add_to_hard_reg_set (set, mode, regno);
-		    }
-		  break;
-		}
+	      {
+		cl = reg_class_for_constraint (lookup_constraint (p));
+		if (cl != NO_REGS)
+		  {
+		    /* There is no register pressure problem if all of the
+		       regs in this class are fixed.  */
+		    int regno = ira_class_singleton[cl][mode];
+		    if (regno >= 0)
+		      add_to_hard_reg_set (set, mode, regno);
+		  }
+	      }
 	}
     }
 }