Remove AND_COMPL_HARD_REG_SET

Use "x &= ~y" instead of "AND_COMPL_HARD_REG_SET (x, y)", or just
"x & ~y" if the result is a temporary.  This means that we're splitting
it into two operations, but the compiler should be able to combine them
for reasonable values of FIRST_PSEUDO_REGISTER.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
	* caller-save.c (setup_save_areas): Use "&~" instead of
	AND_COMPL_HARD_REG_SET.
	(save_call_clobbered_regs): Likewise.
	* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
	Likewise.
	* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
	* config/i386/i386.c (ix86_conditional_register_usage): Likewise.
	* config/mips/mips.c (mips_class_max_nregs): Likewise.
	(mips_conditional_register_usage): Likewise.
	* config/sh/sh.c (output_stack_adjust): Likewise.
	* ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
	(setup_profitable_hard_regs): Likewise.
	(get_conflict_and_start_profitable_regs): Likewise.
	* ira-conflicts.c (print_allocno_conflicts): Likewise.
	(ira_build_conflicts): Likewise.
	* ira-costs.c (restrict_cost_classes): Likewise.
	(setup_regno_cost_classes_by_aclass): Likewise.
	* ira-lives.c (process_bb_node_lives): Likewise.
	* ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
	(setup_class_subset_and_memory_move_costs, setup_pressure_classes)
	(setup_allocno_and_important_classes, setup_class_translate_array)
	(setup_reg_class_relations, setup_prohibited_class_mode_regs):
	Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
	(process_alt_operands, inherit_in_ebb): Likewise.
	* lra-eliminations.c (update_reg_eliminate): Likewise.
	* lra-lives.c (process_bb_lives): Likewise.
	* reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
	* resource.c (find_dead_or_set_registers): Likewise.
	(mark_target_live_regs): Likewise.
	* sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
	(implicit_clobber_conflict_p): Likewise.
	* shrink-wrap.c (requires_stack_frame_p): Likewise.
	(try_shrink_wrapping): Likewise.

From-SVN: r275532

1 files changed, 4 insertions, 7 deletions

diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c
index ae94365..5d672ac 100644
--- a/gcc/ira-costs.c
+++ b/gcc/ira-costs.c
@@ -255,9 +255,8 @@ restrict_cost_classes (cost_classes_t full, machine_mode mode,
       /* Calculate the set of registers in CL that belong to REGS and
 	 are valid for MODE.  */
       HARD_REG_SET valid_for_cl = reg_class_contents[cl] & regs;
-      AND_COMPL_HARD_REG_SET (valid_for_cl,
-			      ira_prohibited_class_mode_regs[cl][mode]);
-      AND_COMPL_HARD_REG_SET (valid_for_cl, ira_no_alloc_regs);
+      valid_for_cl &= ~(ira_prohibited_class_mode_regs[cl][mode]
+			| ira_no_alloc_regs);
       if (hard_reg_set_empty_p (valid_for_cl))
 	continue;
 
@@ -341,8 +340,7 @@ setup_regno_cost_classes_by_aclass (int regno, enum reg_class aclass)
 
   if ((classes_ptr = cost_classes_aclass_cache[aclass]) == NULL)
     {
-      temp = reg_class_contents[aclass];
-      AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
+      temp = reg_class_contents[aclass] & ~ira_no_alloc_regs;
       /* We exclude classes from consideration which are subsets of
 	 ACLASS only if ACLASS is an uniform class.  */
       exclude_p = ira_uniform_class_p[aclass];
@@ -354,8 +352,7 @@ setup_regno_cost_classes_by_aclass (int regno, enum reg_class aclass)
 	    {
 	      /* Exclude non-uniform classes which are subsets of
 		 ACLASS.  */
-	      temp2 = reg_class_contents[cl];
-	      AND_COMPL_HARD_REG_SET (temp2, ira_no_alloc_regs);
+	      temp2 = reg_class_contents[cl] & ~ira_no_alloc_regs;
 	      if (hard_reg_set_subset_p (temp2, temp) && cl != aclass)
 		continue;
 	    }