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| author | Christophe Lyon <christophe.lyon@linaro.org> | 2020-08-19 09:02:21 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@linaro.org> | 2020-08-24 09:08:30 +0000 |
| commit | 259d072067997ab8f55afcf735c91b6740fd0425 (patch) | |
| tree | bf352a8395dda6acdf1098f669a4a69923478d3d /gcc/ipa-inline-transform.c | |
| parent | cdb2e365fc0dba2ee052827e5ca65234ca82d605 (diff) | |
| download | gcc-259d072067997ab8f55afcf735c91b6740fd0425.zip gcc-259d072067997ab8f55afcf735c91b6740fd0425.tar.gz gcc-259d072067997ab8f55afcf735c91b6740fd0425.tar.bz2 | |
arm: Fix -mpure-code support/-mslow-flash-data for armv8-m.base [PR94538]
armv8-m.base (cortex-m23) has the movt instruction, so we need to
disable the define_split to generate a constant in this case,
otherwise we get incorrect insn constraints as described in PR94538.
We also need to fix the pure-code alternative for thumb1_movsi_insn
because the assembler complains with instructions like
movs r0, #:upper8_15:1234
(Internal error in md_apply_fix)
We now generate movs r0, 4 instead.
2020-08-24 Christophe Lyon <christophe.lyon@linaro.org>
PR target/94538
gcc/
* config/arm/thumb1.md: Disable set-constant splitter when
TARGET_HAVE_MOVT.
(thumb1_movsi_insn): Fix -mpure-code
alternative.
PR target/94538
gcc/testsuite/
* gcc.target/arm/pure-code/pr94538-1.c: New test.
* gcc.target/arm/pure-code/pr94538-2.c: New test.
Diffstat (limited to 'gcc/ipa-inline-transform.c')
0 files changed, 0 insertions, 0 deletions