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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2017-05-18 19:34:13 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2017-05-18 19:34:13 +0000 |
| commit | 52e14b96bd537b5431c577213c14db4686397d71 (patch) | |
| tree | 3fdb1db7c15c1b1ec369836778fa8f0997dceae2 /gcc/ipa-inline-analysis.c | |
| parent | 4287da829c9697c58131666447bf8f707bd8b635 (diff) | |
| download | gcc-52e14b96bd537b5431c577213c14db4686397d71.zip gcc-52e14b96bd537b5431c577213c14db4686397d71.tar.gz gcc-52e14b96bd537b5431c577213c14db4686397d71.tar.bz2 | |
re PR target/80510 (Optimize Power7/power8 Altivec load/stores)
[gcc]
2017-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/predicates.md (simple_offsettable_mem_operand):
New predicate.
* config/rs6000/rs6000.md (ALTIVEC_DFORM): New iterator.
(define_peephole2 for Altivec d-form load): Add peepholes to catch
cases where the register allocator uses a move and an offsettable
memory operation to/from a FPR register on ISA 2.06/2.07.
(define_peephole2 for Altivec d-form store): Likewise.
[gcc/testsuite]
2017-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: New test.
* gcc.target/powerpc/pr80510-2.c: Likewise.
From-SVN: r248254
Diffstat (limited to 'gcc/ipa-inline-analysis.c')
0 files changed, 0 insertions, 0 deletions