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authorTrevor Saunders <tbsaunde+gcc@tbsaunde.org>2017-05-14 00:38:53 +0000
committerTrevor Saunders <tbsaunde@gcc.gnu.org>2017-05-14 00:38:53 +0000
commit8f9b31f7f161bd00d9c7847f117591ec85f9484d (patch)
treed8ac6eee25a394987b1ddd260544bce385bd0857 /gcc/haifa-sched.c
parent0e3de1d41eb6179eac75c8ae44c16c1ba1d2f5dd (diff)
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move several bitmaps from gc memory to the default obstack and use auto_bitmap
These places where probably trying to use the default bitmap obstack, but passing 0 to bitmap_initialize actually uses gc allocation. In any case they are all cleaned up before going out of scope so using auto_bitmap should be fine. gcc/ChangeLog: 2017-05-13 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * haifa-sched.c (estimate_shadow_tick): Replace manual bitmap management with auto_bitmap. (fix_inter_tick): Likewise. (fix_recovery_deps): Likewise. * ira.c (add_store_equivs): Likewise. (find_moveable_pseudos): Likewise. (split_live_ranges_for_shrink_wrap): Likewise. * print-rtl.c (rtx_reuse_manager::rtx_reuse_manager): Likewise. (rtx_reuse_manager::seen_def_p): Likewise. (rtx_reuse_manager::set_seen_def): Likewise. * print-rtl.h (class rtx_reuse_manager): Likewise. From-SVN: r248022
Diffstat (limited to 'gcc/haifa-sched.c')
-rw-r--r--gcc/haifa-sched.c23
1 files changed, 7 insertions, 16 deletions
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 0ebf110..1fcc01d 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -4843,14 +4843,12 @@ estimate_insn_tick (bitmap processed, rtx_insn *insn, int budget)
static int
estimate_shadow_tick (struct delay_pair *p)
{
- bitmap_head processed;
+ auto_bitmap processed;
int t;
bool cutoff;
- bitmap_initialize (&processed, 0);
- cutoff = !estimate_insn_tick (&processed, p->i2,
+ cutoff = !estimate_insn_tick (processed, p->i2,
max_insn_queue_index + pair_delay (p));
- bitmap_clear (&processed);
if (cutoff)
return max_insn_queue_index;
t = INSN_TICK_ESTIMATE (p->i2) - (clock_var + pair_delay (p) + 1);
@@ -7515,15 +7513,13 @@ static void
fix_inter_tick (rtx_insn *head, rtx_insn *tail)
{
/* Set of instructions with corrected INSN_TICK. */
- bitmap_head processed;
+ auto_bitmap processed;
/* ??? It is doubtful if we should assume that cycle advance happens on
basic block boundaries. Basically insns that are unconditionally ready
on the start of the block are more preferable then those which have
a one cycle dependency over insn from the previous block. */
int next_clock = clock_var + 1;
- bitmap_initialize (&processed, 0);
-
/* Iterates over scheduled instructions and fix their INSN_TICKs and
INSN_TICKs of dependent instructions, so that INSN_TICKs are consistent
across different blocks. */
@@ -7539,7 +7535,7 @@ fix_inter_tick (rtx_insn *head, rtx_insn *tail)
gcc_assert (tick >= MIN_TICK);
/* Fix INSN_TICK of instruction from just scheduled block. */
- if (bitmap_set_bit (&processed, INSN_LUID (head)))
+ if (bitmap_set_bit (processed, INSN_LUID (head)))
{
tick -= next_clock;
@@ -7563,7 +7559,7 @@ fix_inter_tick (rtx_insn *head, rtx_insn *tail)
/* If NEXT has its INSN_TICK calculated, fix it.
If not - it will be properly calculated from
scratch later in fix_tick_ready. */
- && bitmap_set_bit (&processed, INSN_LUID (next)))
+ && bitmap_set_bit (processed, INSN_LUID (next)))
{
tick -= next_clock;
@@ -7580,7 +7576,6 @@ fix_inter_tick (rtx_insn *head, rtx_insn *tail)
}
}
}
- bitmap_clear (&processed);
}
/* Check if NEXT is ready to be added to the ready or queue list.
@@ -8617,9 +8612,7 @@ fix_recovery_deps (basic_block rec)
{
rtx_insn *note, *insn, *jump;
auto_vec<rtx_insn *, 10> ready_list;
- bitmap_head in_ready;
-
- bitmap_initialize (&in_ready, 0);
+ auto_bitmap in_ready;
/* NOTE - a basic block note. */
note = NEXT_INSN (BB_HEAD (rec));
@@ -8642,7 +8635,7 @@ fix_recovery_deps (basic_block rec)
{
sd_delete_dep (sd_it);
- if (bitmap_set_bit (&in_ready, INSN_LUID (consumer)))
+ if (bitmap_set_bit (in_ready, INSN_LUID (consumer)))
ready_list.safe_push (consumer);
}
else
@@ -8657,8 +8650,6 @@ fix_recovery_deps (basic_block rec)
}
while (insn != note);
- bitmap_clear (&in_ready);
-
/* Try to add instructions to the ready or queue list. */
unsigned int i;
rtx_insn *temp;