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| author | Kong Lingling <lingling.kong@intel.com> | 2023-03-23 14:25:50 +0800 |
|---|---|---|
| committer | Hongyu Wang <hongyu.wang@intel.com> | 2023-10-07 16:34:30 +0800 |
| commit | ccdc0f0fcf6f240d5c4f059e6f38547a0cca9723 (patch) | |
| tree | 1db898c940cdf4ac3098671f612bde8826f15b48 /gcc/graphite-optimize-isl.cc | |
| parent | 0793ee05b078b99c55170c14c4a32b94d3a54cab (diff) | |
| download | gcc-ccdc0f0fcf6f240d5c4f059e6f38547a0cca9723.zip gcc-ccdc0f0fcf6f240d5c4f059e6f38547a0cca9723.tar.gz gcc-ccdc0f0fcf6f240d5c4f059e6f38547a0cca9723.tar.bz2 | |
[APX EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint.
In inline asm, we do not know if the insn can use EGPR, so disable EGPR
usage by default via mapping the common reg/mem constraint to non-EGPR
constraints.
The full list of mapping goes like
"g" -> "jrjmi"
"r" -> "jr"
"m" -> "jm"
"<" -> "j<"
">" -> "j>"
"o" -> "jo"
"V" -> "jV"
"p" -> "jp"
"Bm" -> "ja
For memory constraints, we add an option -mapx-inline-asm-use-gpr32
to allow/disallow gpr32 usage in any memory related constraints, as
base_reg_class/index_reg_class cannot aware whether the asm insn
support gpr32 or not.
gcc/ChangeLog:
* config/i386/i386.cc (map_egpr_constraints): New funciton to
map common constraints to EGPR prohibited constraints.
(ix86_md_asm_adjust): Calls map_egpr_constraints.
* config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
gcc/testsuite/ChangeLog:
* gcc.target/i386/apx-inline-gpr-norex2.c: New test.
Co-authored-by: Hongyu Wang <hongyu.wang@intel.com>
Co-authored-by: Hongtao Liu <hongtao.liu@intel.com>
Diffstat (limited to 'gcc/graphite-optimize-isl.cc')
0 files changed, 0 insertions, 0 deletions